BOWEN UNIVERSITY LECTURE NOTE
COURSE CODE: CIT210 CREDIT: 3 SESSION : 2020/2021 SEMESTER: Second COURSE DESCRIPTION: Foundation of Sequential Program
LECTURERS: Dr. Famutimi, R.F; Dr. D.O. Olanloye
COURSE CONTENTS’ DISTRIBUTION Dr. Famutimi R.F.
Introduction to Sequential Program
Relationships between H/L Language and the Computer Architecture:
- Motivation for learning H/L Language (Assembly as a case study) - Concept of Computer Architecture
- Hardware and program execution Memory management
Data Registers / Program Counter / Instruction Register / Control Unit / ALU - Instruction cycle
Control structure / Flow of control concepts: Sequential, Selection, Repetition,
Switch statement 6 WEEKS Dr. D.O. Olanloye
Basic Machine Architecture / Classification
Specification and translation of P/L Block Structure Languages
Parameter passing mechanisms 6 WEEKS
LECTURE ONE
TOPIC: Introduction to Sequential Programming and relationship between HLL and the Computer architecture
AIM: The aim of this lecture is to introduce students to the concepts upon which sequential programs are built and expose them to how the components of the computer handle the computer language using the Assembly language as a case study
LEARNING OUTCOME: At the end of the lecture, it is expected that students should have understood the various concepts in Sequential Program and also how computer handles high level languages.
SOURCES OF MATERIALS:
--https://www.sciencedirect.com/topics/computer-science/sequential-programming
INTRODUCTION
Sequential programming is a pattern of code execution in which codes are executed one after the order in a predefined manner. In sequential programming, one task is completed before another one starts.
Things happen at a time. The act of program writing starts with the learning of sequential program. At this level, most programs you would have written must have been sequential. Execution of codes starts at the beginning and continue with each code which may be a declaration or an assignment statement, a call / return / arithmetic operation.
When a program is being written such that execution of codes is not done one after the other, a complicated task will be introduced. This means that there can be many parallel operations going on at the same time. A simple or smallest sequence of code execution is called a “thread”. When there are many threads of execution at the same time in a system, there will be a need for appropriate coordination of the activities through specialized mechanisms (Figure 1.1).
A typical example of sequential programming is when someone wants to prepare more that one delicacy, like jollof rice, pepper soup and pounded yam. If there is only one cook that is available, and only one cooker as well. The cook will use the available cooker to prepare the meal one after the other. He starts with one, completes it and proceed to the next until all are cooked. If however there are more than one cook and cooker available, then the delicacy can be prepared in parallel. This required more resources and coordination.
Single Thread Multiple Threads
Motivation for learning High Level Language (Assembly Language)?
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AL programming teaches one how to write more efficient High Level Language code through a better understanding of what comes out of a compiler.
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It introduces one into the rapidly growing field of embedded programming and robotics.
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In rare cases, programmers may choose to improve the speed of parts of a program by hand-optimizing assembly language that is directing the system on specific
pattern to follow when executing codes. However, a good programmer can often do better with a bit of effort.
What is Computer Architecture?
Computer architecture is defined by its instruction set. Examples are: MIPS, x86 family, 68k family, ARM, PowerPC, VAX, etc.
MIPS - Microprocessor without Interlocking Pipeline Stages.
MIPS processor: Originally used in Unix workstations, now mainly used in small devices. ( Play Station, routers, printers, robots, cameras )
Hardware and Program Execution
All components of a computer are synchronized by a clock pulse, which is a logic signal that alternates between 0 and 1 at regular intervals. On most digital circuits such as computers, events are triggered when the clock transitions from 0 to 1 (leading edge) or when it transitions from 1 to 0 (trailing edge).
The control unit sends out a batch of control signals at each clock pulse. These signals will take some time to propagate (travel) through the circuits to their destination.
Components being controlled by these signals will then respond to those signals at the next clock pulse. For example, if the control unit sends out a signal at pulse 1 telling a register to load a new value, the register will load the value at pulse 2.
The clock speed of a processor is limited by how long it takes for signals to propagate. For instance, in a 3GHz computer, signals must propagate between the most basic CPU elements within 1 /
3,000,000,000 or a second.
Memory
Most modern computers use byte-addressable memory, meaning that each memory address contains 8 bits of data. Hence, a 32-bit word occupies 4 memory addresses. A 32-bit word at memory address 1000 would actually occupy addresses 1000 through 1003.
When storing a single integer across multiple memory addresses, we must choose an order for the bytes.
• Big-endian systems store the most significant byte (the big end) first. For example, the value 0xFF001155 would be stored at address 1000 as follows:
Table 5.1. Big Endian Long Word
Address Content 1000 FF 1001 00 1002 11 1003 55
• Little-endian systems store the least significant byte (the little end) first. For example, the value 0xFF001155 would be stored at address 1000 as follows:
Table 5.2. Little Endian Long Word
Address Content 1000 55 1001 11 1002 00 1003 FF
Memory on modern computers is far slower than the CPU, and takes many CPU clock cycles (or wait- states) to decode an address and read or write the data. If the CPU needs data from memory in order to complete an operation, it may spend many clock cycles doing nothing while it waits for memory to respond. For this reason, memory access is considered a performance bottleneck, and complex systems exist in both hardware and software to avoid memory access as much as possible.
Data Registers
Most CPUs contain a small number (usually 8, 16, or 32) of registers for storing data. Registers are like memory cells, but are part of the CPU rather than on a separate chip. They can usually be accessed in a fraction of the time it takes to access RAM outside the CPU. Hence, assembly language
programmers and compiler-writers try to utilize registers rather than memory in order to optimize for speed. As you will see, this often means sacrificing readability, and necessitating more comments, since register names are fixed, unlike memory locations which can be given descriptive variable names.
The Program Counter (PC)
The program counter (sometimes called instruction pointer) is a special-purpose register that contains the memory address of the next instruction to be executed. Every instruction is fetched from external memory at the address in the program counter, and stored in the instruction register.
When a computer is first powered on, the PC is loaded with the address of an instruction in ROM (BIOS or firmware), which begins the boot sequence. On a PC, the BIOS begins loading the operating system, which in turn loads and runs other programs.
When you run a program, the OS loads the machine code from the executable file into RAM, and sets the program counter to the memory address of the first instruction of the program.
The Instruction Register (IR)
The instruction register is a special-purpose register that holds the instruction code while it's being decoded and executed.
The Control Unit (CU)
Depending on the operation code (opcode) and operands in the IR, the CU generates a sequence of signals to control the other parts of the CPU and memory to execute the instruction.
The Arithmetic and Logic Unit (ALU)
Performs mathematical operations such as add, sub, and, or on one or more operands from registers (or memory in some architectures).
The MIPS Register Files
Although called a "file", a register file is not related to disk files. A register file is a small set of high- speed storage cells inside the CPU. There are special-purpose registers such as the IR and PC, and also general-purpose registers for storing operands of instructions such as add, sub, mul, etc.
A CPU register can generally be accessed in a single clock cycle, whereas main memory may require dozens of CPU clock cycles to read or write.
Since there are very few registers compared to memory cells, registers also require far fewer bits to specify which register to use. This in turn allows for smaller instruction codes.
For example, the MIPS processor has 32 general-purpose registers, so it takes 5 bits to specify which one to use. In contrast, the MIPS has a 4 gibibyte memory capacity, so it takes 32 bits to specify which memory cell to use. An instruction with 3 operands will require 15 bits if they are all registers, and 96 bits if they are all memory addresses.
MIPS is a load-store architecture, which means that only load and store instructions can access
memory. All other instructions (add, sub, mul, div, and, or, etc.) must get their operands from registers and store their results in a register.
Suppose x, y, and sum are variables in a program, and we want to translate the following statement to MAL (Memory Address Location):
sum = x + y
Since variables represent memory locations, the MIPS processor can only use them in load and store instructions. The values must be first loaded into CPU registers using load instructions. We can then add the values in the CPU registers using an add instruction, which must also put the result in a register. Finally, we must use a store instruction to place the result in the variable sum.
# sum = x + y
lw $t0, x # Load x from memory into a CPU register ($to) lw $t1, y # Load y from memory into a CPU register ($t1) add $t0, $t0, $t1 # Add x and y into CPU register ($to)
sw $t0, sum # Store the result from the CPU register to memory
