dual threshold voltage technology
Exploiting Read/Write Asymmetry to Achieve Opportunistic SRAM Voltage Switching in Dual-Supply Near-Threshold Processors
16
A Low Power 90nm Technology based CMOS Digital Gates with Dual Threshold Transistor Stacking Technique
5
Dual Edge Adaptive Pulse Triggered Flip-Flop for a High Speed and Low Power Applications
8
Dual Threshold Voltage Design for Low Power VLSI Circuits Sampangi Venkata Suresh
5
Exploiting Read/Write Asymmetry to Achieve Opportunistic SRAM Voltage Switching in Dual-Supply Near-Threshold Processors
15
A Novel High Performance Dual Threshold Voltage Domino Logic Employing Stacked Transistors
6
Index Terms: MTCMOS, FINFET, Schmitt trigger, power gating techniques, sleep transistor.
7
Hybrid Domino XOR Gate with Dual Threshold Voltage Transistors
11
Analysis of Leakage Current Reduction Techniques in SRAM Cell in 90nm CMOS Technology
5
Leakage Power Reduction in Domino Logic Circuits At 45 Nm Technology
6
Cryogenic characterization of commercial SiC Power MOSFETs
5
Nanometre Regime Era:An Assessment of FinFET Based Low Power Digital Circuits
8
Single waveguide silicon-organic hybrid modulator
7
A dual threshold listen before talk for unlicensed LTE systems
14
A Resistorless CMOS Non-Bandgap Voltage Reference
8
Investigation of threshold voltage and transconductance variations in PMOS
5
Data reliability and error correction for NAND Flash Memory System
157
Design and characterization of 20nm SOI MOSFET doping abruptness dependent
5
An Efficient Ultra Low Power Circuit by Using Subthreshold Adiabatic Logic
5
Design of Low Power 1 Bit Full Adder Using Variable Sub- Threshold Voltage at 45 Nm Technology
11