Fault Tolerant Reversible Logic
Performance Analysis of MOSFET and CNTFET Using Fault Tolerant Reversible Logic Shift Registers
... A logic gate is said to be reversible if it has one to one mapping(bijective), that is, every distinct input yields a distinct output, and the numbers of input and output wires are ...K*K reversible ...
7
Design and Analysis of Parity Preserving Fault Tolerant Reversible Logic Shift Registers Using New 4*4 RR-Gate
... irreversible logic circuit the input vector cannot be recovered from its output ...use reversible gates in order to reduce power” This has led many people to pursue research in the area of reversible ...
7
Berger Checks and Fault Tolerant Reversible Arithmetic Component Design Uppara Rajesh, E Ramakrishna Naik, K Geetha & Dr R Ramachandra
... using reversible logic ...more. Fault Tolerant logic has become a very important technique in the present day electronics, in order to minimize the errors in the ...circuit. ...
8
Review on Fault Tolerant Reversible Arithmetic N-bit Adder/ Subtractor
... that reversible figuring is the main feasible alternative to beat the force ...for reversible registering lies in the way that it gives the main way (that is, the main way that is sensibly steady with the ...
6
Design of Efficient Reversible Fault Tolerant Carry Skip Adder/Subtractor
... a reversible gate or circuit has the same as the number of inputs, and commonly used traditional NOT gate is the only reversible ...a reversible logic gate is a k-input, k-output (denoted k*k) ...
7
Design of Efficient Reversible Fault tolerant Adder/Subtractor
... control logic input i.e. when ctrl is at logic 0, the circuit will acts as adder and when ctrl is at logic 1, the circuit will acts as ...of reversible fault tolerant half ...
6
An Improved Design of Reversible Multiplier Using SDNG GateVaneet Chahal, Mandeep Sharma
... a fault in a single bit. If the system itself made of fault tolerant components, then the detection and correction of faults become easier and ...systems, fault tolerance is achieved by ...
9
MIG and COG Reversible Logic Gate based Fault Tolearnt Full Adder/Subtarctor
... both reversible and characteristically equivalence ...the logic 0, then the conduit functions as the half adder and if ‘ctrl’ is at the logic 1, the conduit executes a ...the logic 0 and the ...
7
MGNREGA: Making Way for Social Change in Women’s: A Case Study of Musunuru Mandal in Andhra Pradesh
... logically reversible if the input of the system can be retrieved from the output obtained from ...physically reversible if it converts no energy to heat and produces no ...entropy. Reversible ...
7
Design of High Speed 64x64 Bit Fault Tolerant Reversible Vedic Multiplier
... of reversible operation, means the information is conversed and performs certain task in ...using reversible logic ...of fault tolerant reversible Vedic multiplier , with the aim ...
8
Improve performance of Adder/Subtraction
... both reversible and characteristically equivalence ...the logic 0, then the conduit functions as the half adder and if ‘ctrl’ is at the logic 1, the conduit executes a ...the logic 0 and the ...
13
A Low Power Fault Tolerant Reversible Decoder Using Verilog HDL Chintakindi Mahipal & P Anjaiah
... the reversible logic synthesis for the n-to-2n decoder; where n is the fault tolerant Fredkin and Feynman double ...the reversible fault tolerant decoder have been ...
9
Design of A Reversible Fault Tolerant Fft Using Reversible Gates
... of reversible gates like fredkin gate, Peres gate, Feynman gate, HNG gate and sayem gate which are shown below with a unique output ...of reversible logic gates are that it reduces the energy loss by ...
5
A Reliable Adder Circuit with Voter Element for Fault Detection and Correction using Reversible Gates
... a fault-tolerant Full adder circuit using reversible logic gates can be done using Triple Modular Redundancy (TMR) with voting ...be fault free; otherwise it will nullify the gains of ...
9
Cost Efficient Fault Tolerant Decoder in Reversible Logic Synthesis
... [1]. Reversible logic circuits condense total energy dissipation due to input signal erasing to zero through providing a unique mapping between the input and output states ...[2]. Reversible ...
6
Vol 4, No 11 (2016)
... blame tolerant channel executions are ...achieve fault tolerance has been presented In this paper we proposed an error detection and correction code called hamming ...with reversible gate ...
6
Implementation Fault Tolerant Full Adder/Subtractor Using Reversible Logic Gates
... literature, reversible sequential circuits designs are offered that are improved for the number of the garbage outputs and reversible ...the reversible comparator based on the quantum gates ...
10
An Optimal Routing Algorithm for Horizontal Moving Signals in OCN for Massively Parallel Systems with Faulty Node/Link
... another fault free node on that path, then before reaching at ‘B’, the message first reaches at ...another fault free optimal path with respect to node ...
12
ARITHMETIC LOGIC UNIT DESIGN FOR REVERSIBLE LOGIC CONDITION USING REVERSIBLE LOGIC GATES
... using reversible logic circuits in place of conventional logic circuits the problem of energy loss can be solved in digital circuit designing the reversibility has become the most promising ...bit ...
9
A. Fault-Tolerant Architectures
... Abstract—In the EPON, many previous studies proposed dedicated protection architectures to protect the critical components which results in high cost for deployment. To achieve high reliability and low-cost for ...
6