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High-Speed Digital

Design Flow Based on Sensitivity Analysis for High-speed Digital Circuits

Design Flow Based on Sensitivity Analysis for High-speed Digital Circuits

... The focus of this thesis is to develop a design flow for high-speed digital circuits that share common design characteristics. The design flow will include an analysis of the sensitivity of overall ...

101

Symmetrical High-Speed Digital Subscriber Line (SHDSL) Channel Modelling

Symmetrical High-Speed Digital Subscriber Line (SHDSL) Channel Modelling

... Symmetrical high-speed digital subscriber line (SHDSL) is a data communication technology for equal transmits and receive data rate over the copper telephone ...the speed of the SHDSL system ...

24

Design of a high speed digital to analog converter

Design of a high speed digital to analog converter

... growing digital telecommunications market has generated an unprece- dented demand for high-speed digital-to-analog (D/A) ...the digital domain, which tightens the requirements of the ...

109

Experimental investigation of high speed digital circuit’s return current on electromagnetic emission

Experimental investigation of high speed digital circuit’s return current on electromagnetic emission

... a high speed printed circuit board (PCB). In high-speed digital circuit, the high-frequency return current signal will find its way back to the source by flowing along the path ...

5

Cosine-Modulated Multitone for Very-High-Speed Digital Subscriber Lines

Cosine-Modulated Multitone for Very-High-Speed Digital Subscriber Lines

... In this paper, the use of cosine-modulated filter banks (CMFBs) for multicarrier modulation in the application of very-high-speed digital subscriber lines (VDSLs) is studied. We refer to this ...

16

Propagation of high speed digital signals in printed circuit board systems - phase II

Propagation of high speed digital signals in printed circuit board systems - phase II

... The project is in three phases with the work progressing from literature and product review to development and integration of a computer aided design tool. Phase I lasted six months and [r] ...

294

Effective Design of an High speed Digital Fault Tolerant Architecture

Effective Design of an High speed Digital Fault Tolerant Architecture

... presents high speed fault tolerant architecture design for digital ...a high performance, high availability network capable of tolerating a broad scope of hardware, software, and ...

5

High Speed Digital Oscillator Implementations Based on Advanced Arithmetic and Architecture Techniques

High Speed Digital Oscillator Implementations Based on Advanced Arithmetic and Architecture Techniques

... Pipelining is an advanced hardware technique that, in most cases, significantly improves the performance of digital arithmetic units. The cost of pipelining is usually embedded in the inter-stage buffers ...

12

Design an High speed Digital Fault Tolerant Architecture

Design an High speed Digital Fault Tolerant Architecture

... Fault tolerance is the property that enables a system to continue operating properly in the event of the failure of (or one or more faults within) some of its components. If its operating quality decreases at all, the ...

7

Propagation of high speed digital signals in printed circuit board systems - phase I

Propagation of high speed digital signals in printed circuit board systems - phase I

... This working paper reports on preliminary printed circuit board measurements comparing printed circuit boards with solid and with lattice ground and supply planes, initial developments o[r] ...

128

Direct RF Sampling GNSS Receiver Design and Jitter Analysis

Direct RF Sampling GNSS Receiver Design and Jitter Analysis

... a high fre- quency analog-to-digital converter, wideband RF ampli- fying chain as well as high speed digital signal process- ing architecture, the prototype demonstrated the real-time ...

16

196205 pdf

196205 pdf

... 12 lesson Syllabus for INTRODUCTION TO HIGH SPEED DIGITAL COMPUTATION II Advanced High School Course on Computers 1-4 Applications of Computers, Advanced application~ in science and busi[r] ...

102

High Speed 16 Bit Digital Multiplier Architecture Using Urdhwa Tiryakbhyam and Compressors

High Speed 16 Bit Digital Multiplier Architecture Using Urdhwa Tiryakbhyam and Compressors

... very high Speed processing power and low area is area is ...of digital signal processor as well as general purpose processors that substantially decide the performance of the ...a high ...

9

IMPLEMENTATION AND COMPARATIVE STUDY OF A HIGH SPEED MULTIMO DE DIGITAL MODULATOR FOR POWER CONSTRAINED DIGITAL COMM UNICATION

IMPLEMENTATION AND COMPARATIVE STUDY OF A HIGH SPEED MULTIMO DE DIGITAL MODULATOR FOR POWER CONSTRAINED DIGITAL COMM UNICATION

... multi-mode digital modulator was proposed and prototyped in this paper, with the target of achieving high throughput and very low power ...had high power ...all digital communication requiring ...

8

A reconfigurable high speed analog to digital converter architecture for ultra wideband devices

A reconfigurable high speed analog to digital converter architecture for ultra wideband devices

... This type of monitoring is finds usage in a host of other bio‐medical situations concerning patient monitoring and preventative healthcare. The technique can be used inside hospitals to transmit patient’s vital ...

180

Performance improvement in FIR filter using Residue Number System with modulo adders and multipliers

Performance improvement in FIR filter using Residue Number System with modulo adders and multipliers

... and high speed real-time digital filters will be necessary to find applications in radar, communications and image processing ...the speed of the system will be increased ...

6

A Hysteresis Current Control Technique for Electronics Convertor

A Hysteresis Current Control Technique for Electronics Convertor

... During last some years, Active power convertors and high frequency convertors are being more and more popular. As frequency of these convertors is increases, the Switching losses and source harmonics are increase ...

8

Design of a High Speed 32 Bit Parallel Hybrid Adder for Digital Arithmetic System

Design of a High Speed 32 Bit Parallel Hybrid Adder for Digital Arithmetic System

... Abstract—Addition is a heavily used basic fundamental arithmetic operation that figures prominently in any digital logic system, digital signal processor, control system and scientific applications. ...

9

12-Bit High Speed Direct Digital Frequency Synthesizer Based on Pipelining Phase Accumulator Design

12-Bit High Speed Direct Digital Frequency Synthesizer Based on Pipelining Phase Accumulator Design

... High speed operation is one of the important requirements in a DDFS system.. The phase accumulator (PA) is a key element of the DDFS system and the adder is the core of the PA. Therefore, the improvement of ...

6

VLSI design of high-speed adders for digital signal processing applications.

VLSI design of high-speed adders for digital signal processing applications.

... A simple solution to the throughput rate problem is to allow sim ul taneous execution of many tasks by multiple arithmetic units. Parallel pr ocessing with straight har dware duplication, however, may not be economical ...

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