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low power analog applications

Design of Low Voltage, Low Power FGMOS Based Voltage Buffer, Analog Inverter and Winner Take All Analog Signal Processing Circuits

Design of Low Voltage, Low Power FGMOS Based Voltage Buffer, Analog Inverter and Winner Take All Analog Signal Processing Circuits

... less power than the minimum power required for a CMOS circuit of same technology without compromising on device performance ...[1]. Applications of FGMOS transistors in neural networks [2], ...

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Low Power and High Speed 4-Bit Flash Analog to Digital Converter Using Dynamic Latch Comparator Technique

Low Power and High Speed 4-Bit Flash Analog to Digital Converter Using Dynamic Latch Comparator Technique

... and low power ...are analog in nature for example video, sound, ...use analog to digital converter for converting analog type of signal to digital ...back analog signal digital ...

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Reduced Comparator Flash ADC for ECG Applications

Reduced Comparator Flash ADC for ECG Applications

... based low power 4-bit Flash Analog to Digital Converter (ADC) design with reduced number of comparators than the conventional Flash Analog to Digital Converter and multiplexer based ...

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Investigation of Low Power Sample and Hold Circuit for Analog to Digital Converter

Investigation of Low Power Sample and Hold Circuit for Analog to Digital Converter

... high power. For low power consumption, Various sample and hold circuits like Bootstrap Circuit, Low-Power Bootstrapped S/H Circuit without Multiplier Circuit & Boosted Driver ...

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Sigma Delta Modulators: A Review

Sigma Delta Modulators: A Review

... oversampling analog-to-digital converters (ADCs) that perform “quantization noise shaping,” thus achieving a high signal-to-noise ratio ...in analog and RF ...(SD) analog-to-digital converters (ADCs) ...

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A 1.2V 8 BIT SAR ANALOG TO DIGITAL CONVERTER IN 90NM CMOS

A 1.2V 8 BIT SAR ANALOG TO DIGITAL CONVERTER IN 90NM CMOS

... (SAR) analog to digital converters are widely utilized for low speed and low power ...SAR analog to digital converter consumes ...

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RF low power subsampling architecture for wireless communication applications

RF low power subsampling architecture for wireless communication applications

... highly power-hungry blocks such as LO and RF PLL are still existing in the ...reduce power consumption of the system without using RF/analog blocks, it increases the memory of ADC which cannot be ...

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An Ultra Low Power Digital to Analog Converter Optimized for Small Format LCD Applications

An Ultra Low Power Digital to Analog Converter Optimized for Small Format LCD Applications

... Table of Contents Acknowledgements iii Abstract iv Table of Contents List of Figures List of Tables List of Publications Chapter 1: v vi viii and Patents ix Introduction 1 1.1 Liquid Cry[r] ...

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Four Quadrant Analog Multiplier Based on Squarer Cells

Four Quadrant Analog Multiplier Based on Squarer Cells

... The simulation results show that this circuit consumes around 100µW with the bias current of 400nA and supply voltage of 1.6V. Also, this circuit can be used for the applications requiring the input signal ...

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Design & Simulation of Low Power Analog to Digital Converter for Medical Applications

Design & Simulation of Low Power Analog to Digital Converter for Medical Applications

... lower power consumption and higher yield. It generated a high demand for low power, low voltage ADCs for sensor ...efficiency Analog to Digital converters with very high sample/s rate ...

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Design and Analysis of Low Power High Performance 13T SRAM for Ultra Low Power Applications

Design and Analysis of Low Power High Performance 13T SRAM for Ultra Low Power Applications

... require low power caches There are various approaches that are adopted to reduce power dissipation, like design of circuits with power supply voltage scaling, power gating ...Lower ...

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Analog Digital Partitioning for Low Power UWB Impulse Radios under CMOS Scaling

Analog Digital Partitioning for Low Power UWB Impulse Radios under CMOS Scaling

... the power consumption for the generation of the UWB signals is to gate an oscillator in the transceiver ...a low-power reception is achieved using baseband gain blocks feeding a time-interleaved bank ...

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Embedded based - urinary tract infection monitoring system using IOT

Embedded based - urinary tract infection monitoring system using IOT

... VoIP applications This module has a powerful enough on-board processing and storage capability that allows it to be integrated with the sensors and other application specific devices through its GPIOs with minimal ...

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A Novel Latch design for Low Power Applications

A Novel Latch design for Low Power Applications

... Conventional 10-transistor Latch is a primarily used in sequential memory related applications (Fig. 1). The transmission gate at the input side contains the data input, which is transmitted through this gate only ...

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A Low Power Analog Front End of BJT based Temperature Sensor for Implanted RFID

A Low Power Analog Front End of BJT based Temperature Sensor for Implanted RFID

... a low-power analog front-end (AFE) of BJT-based temperature sensor for implanted Radio Frequency Identification (RFID) is ...a low-power bias circuit in the AFE is proposed to reduce ...

5

Prediction of Ventricular Arrhythmia for ECG System Using FPGA

Prediction of Ventricular Arrhythmia for ECG System Using FPGA

... a low-power low-noise ECG acquisition system for identifying heart ...an analog front-end circuit and offset and also baseline drift is eliminated ...total power consumed was ...

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Power Dissipation Analysis of Memristor for Low Power Integrated Circuit Applications

Power Dissipation Analysis of Memristor for Low Power Integrated Circuit Applications

... The adiabatic circuit technology is one of the most popular technique of suppressing the energy, it is achieved that voltage across and the current through the on-resistance of metal oxide semiconductor (MOS) becomes ...

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Design of 3t Gain-Cell for Low-Voltage Low-Power Applications

Design of 3t Gain-Cell for Low-Voltage Low-Power Applications

... a good median voltage between VDD and VT, as previously shown to be DRT efficient in GC-eDRAM design. Starting with a charged CSN, WBL is driven low and the word lines are asserted (WWLp= 0 and WWLn = VDD). As ...

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Design And Analysis Of Low Power Single Edge Triggered D Flip Flop Based Shift Registers

Design And Analysis Of Low Power Single Edge Triggered D Flip Flop Based Shift Registers

... T. Ravi was born in Namakkal, Tamilnadu, India in 1978. He received his Bachelor Degree in Electrical and Electronics Engineering from Madurai Kamaraj University in the year 2001, Master Degree in Applied Electronics ...

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Analysis of Power Processing Circuits for Low Power Energy Harvesting Applications

Analysis of Power Processing Circuits for Low Power Energy Harvesting Applications

... relatively low output power. In energy harvesting systems, power electronic circuit forms the key interface between transducer and electronic load, which might include a ...

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