Intrinsic Evolution

A major recent field in the evolution of electronic designs is intrinsic evolution, the practice of directly evolving electronic circuits onto directly onto reprogrammable hardware, allowing the direct sampling of physical circuits without relying on software simulation. Numerous different devices ranging from available widely off-the-shelf ICs and development boards to custom-made ASICs, have been used to research intrinsic evolutions. One of the first examples of intrinsic evolution was by Thompson, with the evolution of a circuit capable of discrimi- nating between two square waves (of frequencies 1KHz and 10KHz), utilising the underlying physical properties of the Xilinx 6126 chip. The field-programmable gate array (FPGA) used was programmed with a program which cannot be explained using conventional design meth- ods, working instead directly on inherent electrical paths within the individual chip used, thus demonstrating that evolutionary methods can be used to produce designs which fall outside the scope of any traditional design methodologies [159].

Another type of device used for intrinsic evolution is Field Programmable Analogue Ar- rays (FPAAs), which contain multiple analogue functions, programmable using binary pat- terns. The arrangement and construction is similar to that of FPGA although the functions are considered in terms of analogue rather than digital performance. Zebulum et al used a Mo- torola MPAA020 switched-capacitor based device to evolve oscillator designs [183]. Another type of FPAA which has been used in evolutionary electronics is the Zetex TRAC (Totally Reconfigurable Analogue Hardware), which contains two parallel sets of ten interconnectable operational amplifiers having various connected components which may be switched on or off,

allowing one of eight distinct circuit functions. Flockton and Sheehan used a test board con- taining 4 TRAC devices and an analogue interface allowing the programming of the devices, analogue signal generation and output signal detection to all be controlled by a PC. They de- signed a set of building blocks that could be implemented using the test board which could be connected together without risking damage to the components [60].

The Field Programmable Transistor Array (FPTA) is a device specifically created for the evolution and research of analogue circuits at transistor level. A FPTA was designed by J¨org Langeheine within the Electronic Vision Group at the University of Heidelberg. The work arose from Thompson’s work evolving a tone-discriminator which exploited the underlying analogue core of the FPGA being used, from which the idea of substrate specifically for con- figuring transistor-based analogue circuits was drawn. The Heidelberg FPTA consists of a 16 x 16 arrangement of configurable PMOS and NMOS transistor cells in a checkerboard pattern. Each cell contains 20 transistors of different sizes, with lengths of 0.6,1,2,4 & 8 µm and widths of 1,2,4 & 8 µm. The transistors can be connected in parallel, allow any effective unit width between 1 & 15 µm allowing 80 possible size arrangements for each tran- sistor cell. Another FPTA device has been developed by JPL with similar intentions to the Heidelberg device although including configurable capacitors and resistors in addition to tran- sistors [100, 101, 102]. Amongst the circuits successfully evolved using the Heidelberg FPTA are the complete set of logic gates and other basic functions such as comparators. Trefzer used a multi-objective approach for evolving a complete operational amplifier on the device. This used twelve different fitness values, including DC offset, slew-rate, settling time, phase- shift and harmonic distortion in addition to gain. To evaluate all these values five different test modes were used. The evolved solutions included what could clearly be identified as a differential input stage [160].

Major drawbacks of custom designs such as the Heidelberg FPTA are the length of time and costs involved in the design, verification and manufacture of such an application specific chip, given its very limited potential market. Ideally one could create an FPTA using the very latest technologies, however it is unlikely that the most recent technology nodes would be available for such a run; the Heidelberg FPTA is manufactured using a 600 nm process and each device cost in excess of US $5K. Another significant issues is that with the nature of FP- TAs relying on switching elements leading to parasitic non-linear resistance and capacitance. Whilst such effects may be exploited by the algorithm (such as in Thompson’s frequency dis- criminator) such results are idiosyncratic and non-portable [158]. A key advantage of intrinsic methods is that all the properties of the silicon may be fully explored. Whilst simulation software only analysis the electronic properties of circuits, intrinsic methods will include any

electromagnetic and thermal properties in the device [183]. This may result include properties which are unique to an individual piece of silicon, in a specific environment. This can however also be a disadvantage if the goal is to create generic, market-ready designs.

Intrinsic evolution generally requires a dedicated and often expensive arrangement of hard- ware in addition to the computing platform limiting the scope and distribution of simulations. Another disadvantage of intrinsic evolution is that the results may be hard to represent using traditional symbolic representations, and they may themselves be limited to the specific indi- vidual chip used (thus rendering them of little real-world value). In contrast, circuits which have been extrinsically simulated are generally already presented symbolically and can be im- plemented and reproduced using real world components [115]. Whilst custom made circuits such as the Heidelberg FPTA are potentially powerful analogue design tools, the time and expense involved in creating such devices limits their availability for research.