Organic Substrate

Organic substrates feature low electrical permittivity, a simple fabrication process, and low cost. Organic materials for the substrates mainly include FR-4 epoxy-glass, BT epoxy, and polyimide and cyanate. Printed circuit board (PCB) fabrication techniques have been widely deployed. Almost every electronic product contains a PCB, on which various components of different sizes are mounted. Major functions of a PCB are to mechanically fix and electrically interconnect all the components and devices.

Increasingly sophisticated electronic systems call for more and more components, which leads to denser and denser wiring on the board. A bare board with no components on either side is usually called a printed wiring board (PWB), which is also widely used in the international packaging industry instead of PCB.

Generally, a core plate of an organic substrate is made up of a thermal-insulating, strong material. A rigid layer of metal foil (mainly copper foil) tracks on the outer surfaces, electrically interconnecting or electromagnetic shielding all components on the PCB.

PCBs are ordinarily green or brown in color as a result of a layer of the solder mask coating on the surface. The solder mask serves as an insulator, prevents copper oxidization, and also prevents components from being incorrectly soldered and connected to metals that will lead to short circuit.

3.2.2 Fabrication Processes of PWB

According to the approach of making metal foils, usually, the fabrication processes of PWB can be classified into two categories: an additive process and a subtractive process. For the additive process, a wiring pattern is deposited by coating conductive materials onto the insulating surface of the board. For the subtractive process, a wiring pattern is formed by removing some needless parts from copper foil, which is coated on the substrate before the process, with chemical etchant. There are two versions of electroplating in the subtractive process, namely panel electroplating and pattern plating.

The panel electroplating approach has the following advantages: first, the electroplating ensures even distribution of dense wiring to prevent sparse wires overloaded by current flow;

second, there is no need to adjust the plating current with the area of circuit patterns as in pattern plating, which is better for mass production and thus has found more practical applications;^[1]third, there is no special requirement that the photoresist be used, because of the etching-resistant layer formed by the lithography process. The disadvantage of the approach is that it is hard to achieve finer patterns by panel electroplating because of the thick copper foil to be etched.

As shown in Figure 3.1, the basic process is as follows:

(1) Via-holes are drilled in the substrate laminated with a double-sided copper layer.

(2) An electroless copper layer is plated onto the surface of via-holes for electrical connec-tion.

(3) Another copper layer is electroplated over the copper seed layer.

(4) Plate is coated with photoresist.

(5) Plate is exposed and developed.

(6) After copper layer is etched to obtain the required copper pattern, the photoresist is removed.

The pattern plating approach also starts with drilling holes on the board, and then a copper layer is chemically deposited inside the holes for electrical connection. Unlike the panel electroplating approach, the process of pattern plating creates wire interconnections

3.2 Organic Substrate 39 through the following steps, first, coating photoresist on those areas that do not require metallic pattern, second, electroplating copper and other metallic protective layers, such as tin or Sn-Pd solder layer, on the remaining area for the traces and pads of the circuit pattern, and finally, removing photoresist. This process also has pros and cons. The photoresist can prevent the deposit of metal under the photoresist pattern. Finer features can be obtained through pattern plating, such as a smooth surface and ordered wiring. However, it requires that the process parameters should be adjusted to the changing surface or design rule of the conductive area in a timely manner. Another problem lies in the uneven thickness of the plated surface on the same board.

Double-sided copper foil layer

Via-hole drilling

Electroplate copper over the seed layer made by electroless copper

Coat photoresist

Expose and develop

Etch and remove photoresist (a)

(b)

(c)

(d)

(e)

(f)

Figure 3.1 Process of panel electroplating approach

According to the numbers of conductive wiring layer, commonly used organic substrates mainly fall into the following categories: single-sided boards, double-sided boards, and multi-layer boards.

1. Single-sided Boards

For the simplest PCB assembly design, devices and components are mounted on one side with wiring patterning on the other side. It is called a single-sided board, as the wiring pattern is fabricated on one side of the board only. Wiring design based on the single-sided board cannot include cross wiring. Therefore, this kind of board was used mainly in early electronic products. Configuration of a single-sided board is shown in Figure 3.2.

Conductor

Board

Via

Single-sided PCB (Via is not electroplated) Figure 3.2 Configuration of a Single-sided Board

40 Chapter 3 Substrate Technology

2. Double-sided Boards

To ensure more flexible and easier electrical interconnection, double-sided boards were developed, and they have conductive patterns on both sides, as shown in Figure 3.3. Patterns on the two sides need to be connected through a “connection bridge,” which is called “via.”

A via is a vertical hole on a PCB filled or plated with metal foils, through which the wiring patterns on both sides can be connected. Since the area of double-sided boards is twice that of single-sided boards and wire crossings are allowed, they are widely used in applications with high-density components, such as computers, communications, office automatic equipment, and so on.

Conductor

Electroplated via

Board

Double sided PCB

Figure 3.3 Configuration of a double-sided board

3. Multilayer Boards

The development of high-density packaging (HDP) requires increasingly high-density wiring that cannot be accomplished on single-sided or double-sided boards. Today, multi-layer boards are widely used to obtain larger wiring area and more flexible wiring rules. A multi-layer board contains more than two double-sided boards that adhere to each other by means of an insulating layer in between. The layer number of multilayer boards is normally equal to the number of independent wiring foils plus the two outer boards. Generally, the number of layers is even.

To meet the requirements of high-density interconnect (HDI), 3D interconnection includ-ing through holes, blind vias, or buried vias should be designed and fabricated within every board. The blind via connects an outer layer with an inner layer next to it. A buried via realizes the interconnection between any two layers.^[1]

However, it is a relatively complex process to obtain HDI inside the multilayer board through vias, blind vias, and buried vias. The process will involve repeating a number of steps including laminating, drilling, metallization of the vias, and pattern plating of each layer. Taking an eight-layer PCB as an example, a typical fabrication process of a multilayer PWB is illustrated here:^[2]

As shown in Figure 3.4, the board is as thick as 0.8 mm. Blind vias exist in layers L1−L4 and L5–L8, and shallow blind vias in L1–L2 and L7–L8. In addition, there are wiring patterns on L4 and L5. Therefore, two four-layer boards are produced first and then pressed together. Detailed processes are as follows:

The process starts with inner layer etching and exposing; forming inner layers of L2–L3 and L6–L7; inner layer AOI; blackening; laminating four-layer boards of L1–L4 and L5–L8;

drilling blind vias on L1–L4 and L5–L8; via metallization; patterning the film affixed to the outer surface of L4 and L5 to form wiring patterns; developing; pattern plating; etching the outer surface; outer layer automated optical inspection (AOI) of L4 and L5; inner layer blackening; laminating L1–L8; punching holes; patterning the film affixed to the outer surface layer at the locations of blind vias; developing and etching the film; AOI; punching blind vias on L1–L2 and L7–L8; via metallization; exposing films affixed to the outer surface of L1 and L8 to form wiring patterns; developing; pattern plating; etching; L1 and L8 AOI;

screen-printing solder mask; label printing; plating gold; electrical test; packaging.