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built-in-test applications

Review of Built in Self Test Technique in Various Digital Circuit Applications

Review of Built in Self Test Technique in Various Digital Circuit Applications

... critical applications, but also for highly-available ...is built-in self-test (BIST), a technique widely applied in manufacturing ...deterministic test sequence periodically to the circuit ...

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Fault Tolerant Network on Chip Using Built in Self Test

Fault Tolerant Network on Chip Using Built in Self Test

... Recently the trend of embedded systems has been moving toward multiprocessor systems-on-chip (MPSoCs) in order to meet the requirements of real-time applications. The complexity of these SoCs is increasing and the ...

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The application of neuMOS transistors to enhanced Built in Self Test (BIST) and product quality

The application of neuMOS transistors to enhanced Built in Self Test (BIST) and product quality

... The neuMOS transistor is a comparatively new device developed in 1991 at Tohoku University, Japan, which is currently showing great promise in the direction of enhanced circuit functionality, particularly in Neural ...

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An Efficient Fault Detection of FPGA and Memory Using Built-in Self Test [BIST]

An Efficient Fault Detection of FPGA and Memory Using Built-in Self Test [BIST]

... Field-Programmable Gate Arrays (FPGAs) are 2-D arrays of Configurable Logic Blocks (CLBs) and programmable switch matrices, surrounded by programmable input/output blocks on the periphery. FPGAs are widely used in many ...

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Reconfiguration based built in self test for analogue front end circuits

Reconfiguration based built in self test for analogue front end circuits

... many applications, this type of function is used on devices where D-A converters (DAC) have also been ...chip test evaluation structure for AGC gain step size testing ...

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BUILT-IN SELF-TEST AND CALIBRATION OF ON-CHIP SPECTRAL CHARACTERISTICS WITH LOW COMPLEXITY

BUILT-IN SELF-TEST AND CALIBRATION OF ON-CHIP SPECTRAL CHARACTERISTICS WITH LOW COMPLEXITY

... An accurate FFT analysis based approach was introduced for on-chip spectral characteristics of multi tone signals. By selecting the appropriate frequency, ADC resolution and FFT length to achieve the desired frequency ...

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Remotely  Managed  Logic  Built-In  Self-Test  for  Secure  M2M  Communications

Remotely Managed Logic Built-In Self-Test for Secure M2M Communications

... M2M applications create new challenges for in-field testing since they typically operate in environments where human supervision is difficult or ...Logic Built-In Self-Test (LBIST) by using a ...

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A Built In Self Test as a Countermeasure for Fault Injection Attacks on Cryptographic Devices

A Built In Self Test as a Countermeasure for Fault Injection Attacks on Cryptographic Devices

... FPGAs operate in a broad range of applications. An FPGA can solve any computable prob- lem. In fact, an FPGA is very similar to an Application Specific Integrated Circuit (ASIC). One of the applications ...

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Graphical User Interfacing of Test Stimulus Generation for Sigma Delta ADC Built in Self Test

Graphical User Interfacing of Test Stimulus Generation for Sigma Delta ADC Built in Self Test

... Dynamic testing is when the converter is stimulated by episodic waveforms instead of dc levels. This type of testing is suitable for production testing due to easier signal generation and less time-consuming behavior. ...

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VHDL Implementation of Logic BIST (Built In Self Test) Architecture for Multiplier Circuit for High Test Coverage in VLSI Chips

VHDL Implementation of Logic BIST (Built In Self Test) Architecture for Multiplier Circuit for High Test Coverage in VLSI Chips

... BIST applications, in-circuit PRPG constructed from linear feedback shift registers (LFSRs) are most commonly used to generate test patterns or test sequences for exhaustive testing, pseudo-random ...

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New Built In Self Test Boundary Scan Architectures for Digital Integrated Circuits in Industrial Applications

New Built In Self Test Boundary Scan Architectures for Digital Integrated Circuits in Industrial Applications

... one test session. The test pattern, applied to the combinational equivalence, is held for d clock cycles, where d is the maximum sequential depth of the ...pseudo-exhaustively test the combinational ...

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ULTRA LOW POWER LFSR FOR BIST

ULTRA LOW POWER LFSR FOR BIST

... Automatic Test Pattern Generation and Automatic Test Pattern Generator) is an electronic design automation method/technology used to find an input (or test) sequence that, when applied to a digital ...

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Addressing Energy System Modelling Challenges: The Contribution of the Open Energy Modelling Framework (oemof)

Addressing Energy System Modelling Challenges: The Contribution of the Open Energy Modelling Framework (oemof)

... With its concept, oemof may already contribute to a process of addressing linguistic uncertainty. Identifying common elements in energy system modelling can help in determining coherent terminologies. Here, experiences ...

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Test Method for Analog and Mixed Signal Device based OBIST and IDDQ

Test Method for Analog and Mixed Signal Device based OBIST and IDDQ

... rising test quality. The test methodology is based on the observation of quiescent current on power supply offer lines permit a decent coverage of physical defects that are not very well modeled by the ...

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Who is SharePoint Joel?

Who is SharePoint Joel?

... • Ideal for applications such as Project Server, Performance Point, BDC applications, CRM, Sales SAP/Siebel and Finance Solutions built on SharePoint. • Great for staged deployments i[r] ...

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What we do in Grids e Science CyberInfrastructure and Peer to Peer Networks

What we do in Grids e Science CyberInfrastructure and Peer to Peer Networks

... Collaboration: built a Web Service based collaboration environment sharing applications and audio/video conferencing to desktops and PDA’s Web Service model for all applications Messagin[r] ...

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Built in Self Test for 4 × 4 Signed and Unsigned Multipliers in FPGA

Built in Self Test for 4 × 4 Signed and Unsigned Multipliers in FPGA

... the test patterns (Inputs) and their outputs are stored in memory and this outputs is compared with the outputs of output response analyzer (ORA) unit if it is match then this mean our multiplier is non-faulty and ...

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Next Generation of HEP CPU Benchmarks

Next Generation of HEP CPU Benchmarks

... HS06 is composed by the SPEC CPU2006 benchmarks based on C++ code, named cpp_all benchmark set. This set showed a good correlation with all the major HEP experiments’ ap- plications considered ten years ago [3]. The main ...

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Community Grids work on Messaging A/V Conferencing Portals

Community Grids work on Messaging A/V Conferencing Portals

... Collaboration: built a Web Service based collaboration environment sharing applications and audio/video conferencing to desktops and PDA’s Web Service model for all applications Messagin[r] ...

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Built-in-self-test of RF front-end circuitry

Built-in-self-test of RF front-end circuitry

... Fuelled by the ever increasing demand for wireless products and the advent of deep submicron CMOS, RF ICs have become fairly commonplace in the semiconductor market. This has given rise to a new breed of Systems-On-Chip ...

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