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VLSI and DSP

MULTIRATE DSP AND ITS TECHNIQUE FOR LOW POWER HIGH SPEED VLSI OF INTERPOLATOR UNIT

MULTIRATE DSP AND ITS TECHNIQUE FOR LOW POWER HIGH SPEED VLSI OF INTERPOLATOR UNIT

... Multirate DSP and its techniques of the system which includes sampling rate ...for VLSI system and also it becomes one of the most critical design ...

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VLSI Implementation of Cascaded Integrator Comb Filters for DSP Applications

VLSI Implementation of Cascaded Integrator Comb Filters for DSP Applications

... The recursive comb filters or Cascaded Integrator Comb filter (CIC) are commonly used as decimators for the sigma delta modulators. This paper presents the VLSI implementation, analysis and design of high speed ...

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Vlsi Implementation Of N×M-Bit Rsfq Multiplier For Dsp or Multimedia Applications

Vlsi Implementation Of N×M-Bit Rsfq Multiplier For Dsp or Multimedia Applications

... We have developed and experimentally evaluated at high-speed a complete set of arithmetic circuits (multiply, add, and accumulate) for high performance digital signal processing (DSP). These circuits take ...

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AI Based Low complexity VLSI Architectures for 2D Daubechies Wavelet Filters for DSP Applications

AI Based Low complexity VLSI Architectures for 2D Daubechies Wavelet Filters for DSP Applications

... ABSTRACT: The field of separate rippling transforms has been attracting substantial interest partially as a result of the rippling analysis being capable of modeling an indication into a specific set of basic functions ...

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Novel VLSI Architecture of Fir with Lut Less Method Using Distributive Arithmetic for DSP Applications

Novel VLSI Architecture of Fir with Lut Less Method Using Distributive Arithmetic for DSP Applications

... 1) Kyung-Saeng K, Lee K (2003). Low- power and area efficient FIR filter implementation suitable for multiple tape, Very Large Scale Integration (VLSI) Systems, vol 11, No 1.2. S.F. Hsiao, JH ZhangJia, M-C Chen “ ...

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													Design of ultra low-power 16-bit carry select adder using fully symmetrical bridge style circuit

1. Design of ultra low-power 16-bit carry select adder using fully symmetrical bridge style circuit

... As the demand of low power circuits increasing in the modern days,design of power efficient logic systems has became the most important areas of research in VLSI system design.The digital can perform many types of ...

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16 BIT UNSIGNED MULTIPLIER USING PROPOSED CSLA

16 BIT UNSIGNED MULTIPLIER USING PROPOSED CSLA

... Carry select adder is one of the fastest adders used in many dsp’s, to perform fast arithmetic functions. Sum and carry are calculated by assuming input carry as 1 and 0 prior to input carry comes .When the actual carry ...

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IMPLEMENTATION OF VITERBI ALGORITHM ON DSP

IMPLEMENTATION OF VITERBI ALGORITHM ON DSP

... Viterbi decoding has been shown [9] to be a practical method for improving satellite and space communication efficiency by 4 to 6 dB, at a bit error rate of 10^-5. A modified Adaptive Viterbi algorithm, referred to as ...

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A Novel Discrete cosine transforms & Distributed arithmetic

A Novel Discrete cosine transforms & Distributed arithmetic

... Distributed arithmetic (DA) provides application in Very Large Scale Integration (VLSI) implementations of Digital Signal Processing (DSP) algorithms. Most of these applications, for example Discrete Cosine ...

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Design of Reversible Comparators with Priority Encoding Using Verilog HDL 
B Chaitanya Latha & V Praveen Kumar

Design of Reversible Comparators with Priority Encoding Using Verilog HDL B Chaitanya Latha & V Praveen Kumar

... Page 181 Design of Reversible Comparators with Priority Encoding Using Verilog HDL B Chaitanya Latha M Tech (VLSI SD), Alfa College of Engineering and Technology V Praveen Kumar, M Tech (DSP) Associat[.] ...

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Implementation of bit serial CORDIC for Robotic Applications.

Implementation of bit serial CORDIC for Robotic Applications.

... Today cordic algorithm is used in Neural Network VLSI design, high performance vector rotation DSP applications, advanced circuit design, optimized low power design. CORDIC algorithm revolves around the ...

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DSP Based Vedic Multiplier

DSP Based Vedic Multiplier

... High speed arithmetic operations are very important in many signal processing applications. Speed of the digital signal processor (DSP) is largely determined by the speed of its multipliers. In fact the ...

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Nuclear localization of Desmoplakin and its involvement in telomere maintenance

Nuclear localization of Desmoplakin and its involvement in telomere maintenance

... identified DSP as telomere-associated ...of DSP, one of the top hits in our CASID analysis, suggest that our list contains some novel telomere binding ...detected DSP in their list but it was not ...

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DSP Applications for Genomic Sequences

DSP Applications for Genomic Sequences

... The Digital Signal Processing (DSP) techniques uses a set of mathematical tools to analyze and process signals, among them can be mentioned as Discrete Fourier Transform, Z transform, Digital Filters, Parametric ...

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VLSI design of high-speed adders for digital signal processing applications.

VLSI design of high-speed adders for digital signal processing applications.

... CMOS has emerged as the most suitable technology for VLSI design and will be the dominant technology for the next decade [13]. The greatest advantage of CMOS over NMOS is its inherent low power characteristics. ...

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Sensory neuropathy and metabolic risk factors in human immune deficiency virus infected South Africans receiving protease inhibitors

Sensory neuropathy and metabolic risk factors in human immune deficiency virus infected South Africans receiving protease inhibitors

... symptomatic DSP [14, ...symptomatic DSP [2, ...of DSP including treatment with isoniazid, micronutrient deficiencies including inad- equate pyridoxine supplementation and the cumulative oxidative ...

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Direct social perception of emotions in close relations

Direct social perception of emotions in close relations

... of DSP, which hinges on the ideas of rich perception, attention, and pattern ...distinguished DSP from other accounts of mindreading, such as TT and ST, claiming that the main difference between these camps ...

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Repeated administration of the noradrenergic neurotoxin N-(2-chloroethyl)-N-ethyl-2-bromobenzylamine (DSP-4) modulates neuroinflammation and amyloid plaque load in mice bearing amyloid precursor protein and presenilin-1 mutant transgenes

Repeated administration of the noradrenergic neurotoxin N-(2-chloroethyl)-N-ethyl-2-bromobenzylamine (DSP-4) modulates neuroinflammation and amyloid plaque load in mice bearing amyloid precursor protein and presenilin-1 mutant transgenes

... but DSP-4 treatment did not further alter the levels of these mRNA in TG ...age, DSP-4 treatment of WT mice did not cause an increase in interleukin-1 beta (IL-1β) levels com- pared with vehicle treated WT ...

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A DSP Technique for Prediction of Cancer Cell

A DSP Technique for Prediction of Cancer Cell

... Today DSP plays a vital role in this effort because the DSP technique can identify hidden periodicities and features which cannot be revealed easily by conventional statistical ...using DSP technique ...

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Implementation of RISC Microprocessor for DSP Systems

Implementation of RISC Microprocessor for DSP Systems

... In this project the efficient implementation of RISC processor is done. We have designed risc processor for dsp applications and is implemented on Xilinx 14.5 using Spartan 6 FPGA kit. The simulation results ...

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