VLSI and DSP
MULTIRATE DSP AND ITS TECHNIQUE FOR LOW POWER HIGH SPEED VLSI OF INTERPOLATOR UNIT
9
VLSI Implementation of Cascaded Integrator Comb Filters for DSP Applications
6
Vlsi Implementation Of N×M-Bit Rsfq Multiplier For Dsp or Multimedia Applications
5
AI Based Low complexity VLSI Architectures for 2D Daubechies Wavelet Filters for DSP Applications
7
Novel VLSI Architecture of Fir with Lut Less Method Using Distributive Arithmetic for DSP Applications
6
1. Design of ultra low-power 16-bit carry select adder using fully symmetrical bridge style circuit
7
16 BIT UNSIGNED MULTIPLIER USING PROPOSED CSLA
6
IMPLEMENTATION OF VITERBI ALGORITHM ON DSP
6
A Novel Discrete cosine transforms & Distributed arithmetic
7
Design of Reversible Comparators with Priority Encoding Using Verilog HDL B Chaitanya Latha & V Praveen Kumar
7
Implementation of bit serial CORDIC for Robotic Applications.
5
DSP Based Vedic Multiplier
11
Nuclear localization of Desmoplakin and its involvement in telomere maintenance
13
DSP Applications for Genomic Sequences
7
VLSI design of high-speed adders for digital signal processing applications.
180
Sensory neuropathy and metabolic risk factors in human immune deficiency virus infected South Africans receiving protease inhibitors
7
Direct social perception of emotions in close relations
13
Repeated administration of the noradrenergic neurotoxin N-(2-chloroethyl)-N-ethyl-2-bromobenzylamine (DSP-4) modulates neuroinflammation and amyloid plaque load in mice bearing amyloid precursor protein and presenilin-1 mutant transgenes
16
A DSP Technique for Prediction of Cancer Cell
5
Implementation of RISC Microprocessor for DSP Systems
5