XNOR and XOR Gates
Voltage Controlled Ring Oscillator Design with Novel 3 Transistors XNOR/XOR Gates
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Urdhwa Multiplier using XOR-XNOR based 4:2 and 7:2 Compressors
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Comparative Performance Analysis of XOR - XNOR Function Based High - Speed CMOS Full Adder Circuits
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Design of High Speed Six Transistor Full Adder using a Novel Two Transistor XOR Gates
5
A New Design of XOR XNOR gates for low power application
5
Implementation of low power and fast full adder by using new XOR and XNOR gates
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Performance Improvement of Low Power and Fast Full Adder by Exploring New XOR and XNOR Gates
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ALU, CMOS, GDI, XOR, XNOR.
7
Design and Study with Optical XOR/XNOR Network
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Area Efficient Three-Input XOR/XNOR Circuit
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Systematic Cell Design of Three-Input XOR/XNOR with Energy Efficiency
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A Comparative Performance Analysis of Various CMOS Design Techniques for XOR and XNOR Circuits
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DESIGN OF THREE-INPUT XOR/XNOR USING SYSTEMATIC CELL DESIGN METHODOLOGY
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Application of FGMOS and QFGMOS Technology for Low Power Design of XOR and XNOR gate
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Full Adder Designs Using Low Power Full Swing Xor and Xnor Structures
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Design of ODD Even Parity Generator using Six Transistors XOR XNOR Module
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VLSI Architecture for Urdhwa Multiplier using XOR-XNOR based 4:2 Compressors
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LOW-POWER AND FAST FULL ADDER BY EXPLORING NEW XOR AND XNOR GATES 1 Kota Santhosh, 2 M Pushpa Latha, 3 Dr. D SubbaRao
1-Bit Full Adder Circuit using XOR-XNOR Cells with Power and Area Optimization
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Analysis of Conventional CMOS and FinFET based 6 T XOR XNOR Circuit at 45nm Technology
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