An addressing mode is a method of accessing operands. The addressing mode defines how the instruction will be coded and how it will operate to access and process data. Many instructions can operate in different modes, yet some operate only in a single mode. The addressing mode also defines how the effective address of an operand will be generated. The effective address is the address of the operand in memory. Each addressing mode accesses the effective address in a different manner. For example, the effective address for an immediate mode instruction is the address of the data following the opcode. Furthermore, an indexed mode instruction must calculate the effective address from the contents of the index register and the 8-bit offset provided in the instruction.
T he application of the addressing modes on the HC11 is presented in section 2.3. Methods of Addressing Memory
Every memory location in memory has a unique address. When data is needed from memory to complete an instruction, the processor generates the effective address and accesses the data stored at that location. There are many methods used by most computers to produce the effective addresses of data in memory. Five methods will be described in the following sections.
Immediate
Immediate addressing is used when the operand immediately follows the instruction opcode in memory. Thus, the memory access is limited to those locations immediately following the instruction opcode.
A number may be needed in a processor to complete a set of instructions. If this number is always the same value, it could be easily loaded into the register using the 32
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immediate mode. The number actually resides in the memory location immediately following the instruction opcode, as shown in Figure 2.3.
Absolute
Absolute addressing is used to access the operand directly from memory. The address of the operand follows the instruction opcode in memory. This mode is implemented on different processors in several forms.
Assume for a minute that an operand is in memory location $0012. This address would follow the instruction opcode in memory. When the instruction is executed, the address is retrieved from the memory and then used as the address of the operand. Additional machine cycles must be executed to then retrieve the actual operand that is processed, as shown in Figure 2.4.
Implied
In implied addressing, no address is necessary because the location of the data is implied by the instruction. For example, if data already exists in two separate accumulators in the processor, this data can be directly added without accessing memory. The instruction that would be used to add the contents of these two accumulators together would be im- plemented in the implied mode, since the data is implied as shown in Figure 2.5. Because the data is already provided in the two accumulators, the data does not need to be retrieved from memory before the addition operation is completed. The instruction is inherently complete, by itself.
Indexed
Indexed addressing uses an address in a register called an index register combined with an address offset to determine the location of the operand in memory. The
opcode operand
AccA Instruction: Load AccA with contents of memory (M) ⇒AccA, using immediate addressing
operand immediately follows opcode in memory. 86 29 29 AccA IR receives this code—decoder causes next byte to be loaded into AccA.
Figure 2.3 Loading AccA Using Immediate Addressing
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instruction indicates which register to use, and the address offset follows the instruction opcode in memory. The address of the operand is calculated by adding the address offset to the address from the index register or by indexing the base address contained in the register. This addressing mode allows for simple access to data stored in a table. A detailed presentation of the HC11 implementation of indexed addressing mode is provided in chapter 5. 34 opcode address operand Operand is located in memory at address supplied by instruction M AccA Instruction: Load AccA with contents of memory
(M) ⇒AccA, using absolute addressing
address of operand B6 $0120 29 29 $0120 AccA IR receives this code—decoder causes address M to be retrieved, then actual operand to be loaded into AccA from (M).
Figure 2.4 Loading AccA Using Absolute Addressing
opcode operand operand
+
AccB AccA
Instruction: Add contents of AccA to contents of AccB and store result in AccA.
Operands are already in processor registers so no memory accessing is necessary. 1B 29 6C 43 + AccB AccA
IR recieves this code— decoder causes contents of A to be added to contents of B and stores result in A.
Overwrite 29 with 6C in A
Figure 2.5 Adding AccA to AccB Using Inherent Addressing Technician’s Guide to the 68HC11 Microcontroller
Assume for a minute that an operand is in memory location $1012 and that the address $1000 is contained in a processor index register. In this case an address offset of $12 would follow the instruction opcode in memory. When the instruction is executed, the address offset is retrieved from the memory and then added to the address in the index register to calculate the address of the operand ($1012). This calculated address would then be used to access the operand in memory, as shown in Figure 2.6.
Relative
Relative addressing is used to change the flow of the program so that the instructions do not have to be laid out in a sequential manner. The address of the next instruction is described relative to the current position in memory. Instructions that use the relative mode express the location of the next instruction with an address displacement that is added to the current memory location. Thus, the next location is relative to the current position and not an address, which is absolutely specified. This addressing mode is used only to express the location of the next instruction to execute, rather than the location of an operand in memory. The displacement is a signed 2’s complement value, which occupies a single byte. Since the displacement is a signed value, the flow of the program can change to instructions before or after the current instruction in memory.
Assume for a minute that a relative mode instruction is located at $01A7 and that the next instruction is located at $01A9. When the relative mode instruction is executed, the address offset is retrieved from the memory and used to calculate the address of the next instruction to execute. The reference point is always the address of the next instruction in memory. Therefore, as shown in Figure 2.7, the address $01A9 is the reference point, and the new address is calculated relative to this position.
opcode offset operand Memory address X M M = X + offset AccA A6 20 29 29 Memory 0100 X $0120 + AccA Instruction: Load AccA with contents of memory,
using indexed addressing.
IR receives this code— decoder causes address M to be calculated from (X) + offset, then actual operand is loaded into AccA from (M).
Offset
Figure 2.6 Loading AccA Using Indexed Addressing
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