Subtract instructions are a subset of the many arithmetic instructions that use the internal arithmetic logic unit. Each instruction performs a mathematical subtraction operation on the contents of an accumulator or a memory location. The result of each of these operations is written back into the accumulator or memory location designated by the instruction.
Subtract Instructions
Subtract instructions are responsible for subtracting data from the contents of one of the accumulators. Both 8-bit and 16-bit subtract instructions are supported. In each case, the result of the subtraction operation is kept in the accumulator. The subtract instructions are summarized in Figure 3.14.
SUBA and SUBB are used for 8-bit subtraction. An 8-bit operand from memory is subtracted from the contents of AccA or AccB. SUBD is used to perform 16-bit subtraction operations. A 16-bit operand is subtracted from the contents of AccD, the double accumulator. These instructions operate in the IMM, DIR, EXT, INDX and INDY addressing modes. The SUBA, SUBB and SUBD instructions affect four status flags in the CCR: N, Z, V and C reflect the actual condition of the data after the subtract operation. H is not defined for subtraction.
SBA allows the contents of AccB to be subtracted from AccA. This instruction operates in the inherent addressing mode. The SBA instruction affects four status flags in the CCR: N, Z, V and C reflect the actual condition of the data after the subtract operation. H is not defined for subtraction.
1. Which flag bit is only affected by addition instructions? 2. What is the purpose of the DAA instruction?
3. Can the function of the increment instruction be accomplished with addition and subtraction instructions?
Mnemonic Description Function IMM DIR EXT INDX INDY INH REL S X H I N Z V C
SUBA SUBB
Subtract contents of memory from Acc
(A) - (M) ⇒ A
(B) - (M) ⇒ B X X X X X - - - ] ] ] ]
SUBD Subtract contents of memory from D
(D)-(M):(M+1)
⇒ D X X X X X - - - ] ] ] ]
SBA Subtract B from A (A) – (B) ⇒ A - - - X - - - ] ] ] ]
Figure 3.14 Subtraction Instructions 70
Example 3.10
Problem: Describe what each of the following instructions accomplishes and then indicate the addressing mode used, effective address(es) of the operand, the result and resulting status in the CCR, given the following:
0028 81 22 33 4A 55 6B C7 88 0160 FF 00 D6 00 10 1F 10 0F A $80 X $B600 B $2F Y $0100 CCR $D3 S $0041
Address Machine Code Source Code a. B700 80 65 SUBA #$65 b. 000E F0 01 62 SUBB $0162 c. 012C 93 29 SUBD $29
Solution:
a. Mode = IMM. The byte in the operand field has # sign. Effective address = $B701. It is the address immediately following the opcode in memory. $80 – $65 = $1B → A. N = 0, Z = 0, V = 1, C = 0, thus CCR = $D2.
b. Mode = EXT. The two bytes in the operand field without # sign. Effective address = $0162. Effective address in extended mode is equal to $hhll. (B) – ($0162) = $2F – $D6 = $59 → B. N = 0, Z = 0, V = 0, C = 1 → CCR = $D1.
c. Mode = DIR. The single byte in the operand field without # sign. Effective addresses = $0029 and $002A. First effective address in direct mode is equal to $00dd (M) and second is M+1. (D) – ($0029):($002A) =$802F – $2233 = $5DFC
→ D. N = 0, Z = 0, V = 1, C = 0 → CCR = $D8.
Example 3.11
Problem: Each subtract instruction occupies a fixed number of bytes in memory and requires a fixed number of machine cycles to execute. For each of the following in- structions, use the Motorola documentation to determine the number of bytes it will occupy in memory, name the bytes using the Motorola terminology and determine the opcode and how many machine cycles are required to complete the instruction.
a. SUBB #$16 b. SBA
c. SUBA $B6 71
Solution:
a. Bytes = 2. SUBB IMM will occupy two bytes; the first byte is the opcode and the second is the immediate data (ii). Opcode = $C0. Cycles = 2, 1 fetch and 1 execute. b. Bytes = 1. SBA INH will occupy one byte, the opcode. Opcode = $10. Cycles = 2, 1 fetch and 1 execute.
c. Bytes = 2. SUBA DIR will occupy two bytes; the first byte is the opcode and the second byte is the low byte of the effective address of the operand (dd). Opcode = $90. Cycles = 2, 1 fetch and 1 execute.
Example 3.12
Problem: Draw a flowchart and write the program that will load a byte from memory
$0000, subtract $30 from it, then store the result in locations $0121. Assemble the code, starting at location $0100 and use AccB for the addition. Assume the value stored at $0000 is $21.
Solution: The program starts by loading AccB using direct mode with the value stored at $0000. Then, using immediate mode, it subtracts $30 from the first value and loads the result back into AccB. Finally, using extended mode, it stores the result in location $0121.
Address Machine Code Source Code Comments
0000 D6 00 LDAB $00 ;($0000) → B 0002 C0 30 SUBB $30 ;(B) – $30 → B 0004 F7 01 21 STAB $0121 ;(B) → $0121 72 Example 3.12 Load value from memory Subtract $30 from first value
END Store result
in memory
Example 3.12 Flowchart
Negate Instructions
The negate instructions change the sign of a value in AccA, in AccB or in a memory location. It accomplishes this sign change by using the 2’s complement negation operation on the 8-bit operand. Specifically, these instructions subtract the operand from zero, then overwrite the previous operand with the result, as shown in Figure 3.15. NEGA and NEGB use the contents of AccA or AccB as the operand. These two mnemonic forms operate in the inherent addressing mode. NEG uses the contents of a memory location as the operand; however, it is available only in the EXT, INDX and INDY addressing modes. No support is provided for the DIR addressing mode. Like the subtract instructions, the NEGA, NEGB and NEG instructions affect four status flags in the CCR: N, Z, V and C reflect the actual condition of the data after the negate operation.
Because of the similarity the negate instructions have to the subtract instructions, no additional sample code is provided.
Decrement Instructions
Decrement instructions are a special class of subtraction instructions. They subtract one from the operand, then overwrite the previous operand with this result. The decrement instructions are summarized in Figure 3.16.
The DEC instruction operates on data stored in memory; however, it operates only in the EXT, INDX and INDY addressing modes. No support is provided for the DIR addressing mode. The DECx and DEx forms operate on data stored in one of the processor registers and therefore use the inherent mode. The A, B, S, X and Y registers Mnemonic Description Function IMM DIR EXT INDX INDY INH REL S X H I N Z V C
NEGA NEGB 2’s Complement of Acc $00 – (A) ⇒ A $00 – (B) ⇒ B - - - X - - - ] ] ] ] NEG 2’s Complement of contents of memory $00-(M) ⇒ M - - X X X - - - ] ] ] ]
Figure 3.15 Negate Instructions
Mnemonic Description Function IMM DIR EXT INDX INDY INH REL S X H I N Z V C
DECA DECB
Decrement Acc (A) - 1 ⇒ A
(B) - 1 ⇒ B - - - X - - - ] ] ] -
DES Decrement Stack Pointer (S) - 1 ⇒ S - - - - - X - - - - - - - - - DEX DEY Decrement Index Reg (X) - 1 ⇒ X (Y) - 1 ⇒ Y - - - X - - - ] - - DEC Decrement contents of memory (M) - 1 ⇒ M - - X X X - - - ] ] ] -
Figure 3.16 Decrement Instructions
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are decremented by the DECA, DECB, DES, DEX and DEY instructions respectively. The DEC, DECA and DECB instructions affect three status flags in the CCR: N, Z and V reflect the actual condition of the data after the decrement operation. The DEX and DEY instructions affect only one flag: Z is updated to reflect the actual condition of the data after the decrement. The DES instruction has no effect on the CCR.
No sample code is provided at this point for increment and decrement instructions. However, several examples in chapters 4 and 5 use decrement instructions.
Self-Test Questions 3.4
3.5 Logic
Logic instructions, a subset of the instruction set, require the use of the internal arithmetic logic unit. Each instruction performs a logical operation on the contents of an accumulator or on the operand stored in memory. The result of each of these operations is written back into the accumulator or the memory location designated by the instruction. The logical AND, OR, XOR and NOT operations are supported by the HC11. Each of these instructions performs the logical operation on a group of eight bits. In essence, eight 2-bit pairs are created and operated on independently to produce the result. The logic instructions are summarized in Figure 3.17.
The ANDx instructions perform a logical AND operation on an 8-bit operand and the data contained in one of the 8-bit accumulators, as shown in Figure 3.18. ANDA and ANDB overwrite the contents of the A or B accumulator with the result of the AND operation. ORAx and EORx are functionally identical to the ANDx instructions, except they perform logical OR and XOR operations respectively. The ANDx, ORAx, and EORx instructions are available in the IMM, DIR, EXT, INDX and INDY addressing
1. Which flag bit is not affected by subtract instructions?
2. Why are the negate instructions grouped with subtract instructions?
3. Can the function of the decrement instructions be accomplished with subtraction instructions?
Figure 3.17 Logic Instructions
Mnemonic Description Function IMM DIR EXT INDX INDY INH REL S X H I N Z V C
ANDA ANDB
AND Acc with contents of memory (A) • (M) ⇒ A (B) • (M) ⇒ B X X X X X - - - ] ] 0 - ORAA ORAB OR Acc with contents of memory (A) + (M) ⇒ A (B) + (M) ⇒ B X X X X X - - - ] ] 0 - EORA EORB
XOR Acc with contents of memory (A) ⊕ (Μ) ⇒ A (B) ⊕ (Μ) ⇒ B X X X X X - - - ] ] 0 - COMA COMB NOT Acc 1’s complement of Acc !(A) ⇒ A !(B) ⇒ B X X X X X - - - ] ] 0 1 COM 1’s Complement of contents of memory !(M) ⇒ M - - X X X - - - ] ] 0 1 74
modes. They affect three status flags in the CCR: N and Z reflect the actual condition of the data after the logic operation, and V = 0 indicates that the sign of the result is correct.
The COMx instructions perform a logical NOT operation on an 8-bit operand. COMA and COMB overwrite the contents of AccA or AccB with the result of the NOT operation. The COM form overwrites the contents of a memory location with the result of the NOT operation. This operation is also referred to as the 1’s complement, thus the use of the mnemonic “COM.” The COMA and COMB instructions are available in the INH addressing mode only. The COM instruction is available in the EXT, INDX
75 (AccA) (M) A7 M7 A6 M6 A5 M5 A0 A1 A2 A3 A4 M0 M1 M2 M3 M4 AccA
This 8-bit result will be loaded back into the accumulator, overwriting the previous data. R = (A) AND (M) R7 R0 R1 R2 R3 R4 R5 R6
Figure 3.18 Logical AND Operation on the HC11 (ANDx). The 8-bit contents of AccA is
ANDed as bit pairs with the 8-bit contents of a memory location. Eight 2-input AND gates are used for the operation. The result is loaded back into AccA. OR (ORAx) and XOR (EORx) perform in the same way, except OR gates and XOR gates are used, respectively.
(AccA) A7 A6 A5 A0 A1 A2 A3 A4 AccA R7 R0 R1 R2 R3 R4 R5 R6 R = (A)
This 8-bit result will be loaded back into the accumulator, overwriting the previous data.
Figure 3.19 Logical NOT Operation on the HCII (COMx). The 8-bit contents of AccA
are inverted. Eight NOT gates are used for the operation. The result is loaded back into AccA. COM performs in the same way, except the contents of a memory location are the input and the result overwrites the data in the memory location.
and INDY addressing modes, as shown in Figure 3.19. No support is provided for the DIR addressing mode. These instructions affect four status flags in the CCR: N and Z reflect the actual condition of the data after the logic operation, V = 0 indicates that the sign of the result is correct and C is set.
Example 3.13
Problem: Draw a flowchart and write the program that will perform a logical NOR operation on $43 and $C6. Load AccA with the first value and NOR it with another value. Use immediate mode as much as possible.
Solution: The program starts by loading $43 into AccA using immediate mode. Then, using immediate mode, it ORs $43 with $C6. Finally, the result is NOTed to complete the NOR operation.
Address Machine Code Source Code Comments
0000 86 43 LDAA #F54M$43 ;$43 → A
0002 8A C6 ORAA #F54M$C6 ;$43 OR $C6 = $C7 → A
0004 43 COMA ;!(A) = $38 →D A
Self-Test Questions 3.5
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1. What logical functions are supported by the HC11?
2. Which of the logical functions can operate on data in the 8-bit accumulators? On data in memory? Example 3.13 Load $43 from memory OR first value with $C6 END NOT result Example 3.13 Flowchart