Several types of data shifting and rotating instructions are supported on the HC11.
Shifting of data is based on the principles of serial shift registers. Data is moved one bit to the right (toward the LSB) or one bit to the left (toward the MSB). Logical shifting, as well as arithmetic shifting, is supported. Logical shifting causes a “0” to be shifted into one end of the data word, pushing all of the data bits over one position in the data word, as shown in Figure 3.20.
Arithmetic shifting is similar to logical shifting with one exception. When shifting right (toward the LSB), the sign bit is maintained. Instead of shifting a “0” into the MSB of the data word, a copy of the sign bit (MSB) is shifted and the original sign bit remains in the MSB position of the data word, as shown in Figure 3.20c.
Data rotating is a special form of data shifting. When rotating data, the output of the shifted data is fed back to the input of the shift register and is shifted back into the data word. Both right and left rotate are supported by the HC11, as shown in Figure 3.20.
All shift and rotate instructions on the HC11 utilize the C flag of the CCR to catch the output data bit as it is shifted out of the data word. Whatever bit is being shifted out is moved into the C bit. This permits a simple bit-level test to immediately follow the operation.
Logical Shift Instructions
The logical shift left (LSL) instructions are responsible for shifting a data word one bit to the left. The MSB is shifted into the C flag of the CCR, and the LSB is filled with zero. In Figure 3.21a, there is an 8-bit data word $A7 that will be shifted left. Before the shift is performed, the C flag in the CCR contains zero. When the shift left operation
77
0
b7 b0
a) Logical Shift Right
b7 b0
b) Logical Shift Left
b7 b0
c) Arithmetic Shift Right
b7 b0
d) Rotate Shift Right
b7 b0
e) Rotate Shift Left 0
Figure 3.20 Data Shifting and Rotating
is performed, a “0” is shifted into the LSB from the right. The original 8-bit word is moved one bit position to the left, and MSB is moved into the C flag of the CCR. Thus the resulting data word is $4E and C flag = 1. Figure 3.21b shows how the same process applies to a 16-bit data word stored in AccD.
The logical shift right (LSR) instructions are responsible for shifting a data word one bit to the right. The LSB is shifted into the C flag of the CCR and the MSB is filled with zero. In Figure 3.22a, there is an 8-bit data word $A7 that will be shifted right.
78 1 0 1 0 0 1 1 1 1 0 0 1 1 1 0 0 0 1 0 1 0 1 1 0 1 1 1 1 1 0 1 1 1 1 0 C 1 1 1 1 1 0 0 1 0 0 1 1 0 0 1 0 0 0 $4 $6 $8
0 Before LSLData = $A7, C = 0
After LSL Data = $4E, C = 1
a) 8-bit Logical Shift Left
AccD $E
AccA AccB
$F $C
b) 16-bit Logical Shift Left
Before LSL Data = $B7E4, C = 1 After LSL Data = $6FC8, C = 1 b7 b0 b7 b0 b7 b0
Figure 3.21 Logical Shift Left Examples
0 1 0 1 0 0 1 1 1 1 0 1 0 0 1 0 0 C 1 1 0 1 0 1 1 0 1 1 1 1 0 1 1 0 1 1 0 C 1 0 1 1 1 0 0 1 0 0 1 1 1 1 0 0 1 0 $5 $3 $5 $B $F $2 AccD AccA AccB
a) 8-bit Logical Shift Right
b) 16-bit Logical Shift Right Before LSR Data = $A7, C = 0 After LSR Data = $5E, C = 1 Before LSR Data = $B7E4, C = 1 After LSR Data = $5BF2, C = 0 b0 b7 b7 b0b7 b0
Figure 3.22 Logical Shift Right Examples Technician’s Guide to the 68HC11 Microcontroller
Before the shift is performed, the C flag in the CCR contains zero. When the shift right operation is performed, a “0” is shifted into the MSB from the left. The original 8-bit word is moved one bit position to the right and LSB is moved into the C flag of the CCR. Thus the resulting data word is $53 and C = 1. Figure 3.22b shows how the same process applies to a 16-bit data word stored in AccD.
There are four versions of the logical shift left instruction: LSL, LSLA, LSLB, and LSLD, as shown in Figure 3.23. The LSL instruction operates directly on an 8-bit data word stored at a memory location. It operates in the EXT, INDX and INDY addressing modes. No support is provided for the DIR addressing mode. The LSLA and LSLB instructions operate on the 8-bit data contained in AccA and AccB respectively. The LSLD instruction operates on the 16-bit data word contained in AccD. LSLA, LSLB and LSLD operate in the inherent addressing mode. The logical shift left instructions affect four status flags in the CCR: N, Z, V and C reflect the actual condition of the data after the operation. The V bit indicates sign error for these instructions. V =1 if the sign of the data changed during the shift operation.
There are four versions of the logical shift right instruction: LSR, LSRA, LSRB, and LSRD, as shown in Figure 3.23. There implementation is identical to the logical shift left instructions already described. The logical shift right instructions affect four flag bits in the CCR: N is cleared and Z, V and C reflect the actual condition of the data after the operation. The V bit indicates sign error for these instructions. V =1 if the sign of the data changed during the shift operation.
Example 3.14
Problem: Describe what each of the following instructions accomplishes and then indicate the addressing mode used, the result and resulting status in the CCR, given the following:
0000 81 22 E4 4A 55 6B C7 90 A $C7 0198 FE DC BA 00 10 1F 00 FF B $5E
CCR $D4 79
Mnemonic Description Function IMM DIR EXT INDX INDY INH REL S X H I N Z V C
LSLA LSLB LSLD
Logical shift left Acc See Figure 3.21
- - - X - - - ] ] ] ]
LSL Logical shift left contents of memory See Figure 3.21 - - X X X - - - ] ] ] ] LSRA LSRB LSRD
Logical shift right Acc
See Figure 3.22
- - - X - - - 0 ] ] ]
LSR Logical shift right contents of memory
See Figure 3.22
- - X X X - - - 0 ] ] ]
Figure 3.23 Logical Shift Instructions
Address Machine Code Source Code a. B700 48 LSLA
b. 002E 74 01 9A LSR $019A c. 012C 04 LSRD
Solution:
a. Mode = INH. Nothing in the operand field. Shift left $C7, make LSB 0, stuff MSB into C flag. Result $8E, C = 1. N = 1, Z = 0, V = 0, C = 1 → CCR = $D9.
b. Mode = EXT. The two bytes in the operand field without # sign. Shift right $BA, make MSB 0, stuff LSB into C flag. Result $5D, C = 0. N = 0, Z = 0, V = 1, C = 0
→ CCR = $D2.
c. Mode = INH. Nothing in the operand field. Shift right $C75E, make MSB 0, stuff LSB into C flag. Result $63AF, C = 0. N = 0, Z = 0, V = 1, C = 0 → CCR = $D2. Arithmetic Shift Instructions
The arithmetic shift right instructions are similar to the logical shift right instructions. They shift a data word one bit to the right. The LSB is shifted into the C flag of the CCR; however, the MSB is retained. By holding the MSB, the sign of the data is retained allowing special arithmetic operations on 2’s complement data (signed data). In Figure 3.24, there is an 8-bit data word $A7 that will be shifted right. Before the shift is performed, the C flag in the CCR contains zero. When the shift right operation is performed, the MSB from the data is shifted back into the MSB position. The original 8-bit word is moved one bit position to the right and LSB is moved into the C flag of the CCR. Thus the resulting data word is $D3 and C flag = 1.
There are three versions of this instruction: ASR, ASRA and ASRB, as shown in Figure 3.25. The ASR operates directly on an 8-bit data word stored at a memory location. It operates in the EXT, INDX and INDY addressing modes. No support is provided for the DIR addressing mode. The ASRA and ASRB instructions operate on the 8-bit data con- tained in the A and B accumulators respectively. There is no 16-bit version of the arithme- tic shift right instruction. ASRA and ASRB operate in the inherent addressing mode. The arithmetic shift right instructions affect four status flags in the CCR: N, Z, V and C reflect
80 1 0 1 0 0 1 1 1 1 0 1 0 0 1 0 1 1 1 b7 b0 C $D $3 Before ASR Data = $A7, C = 0 After ASR Data = $D3, C = 1
Figure 3.24 Arithmetic Shift Right Example Technician’s Guide to the 68HC11 Microcontroller
the actual condition of the data after the operation. The V bit still indicates sign error for these instructions, even though a sign error cannot occur since the sign bit is retained.
NOTE: The logical shift left and arithmetic shift left instructions are identical in function and share the same opcodes. The different mnemonic forms are provided for each type only to aid in the readability of source code (i.e., when logical operations are being performed, logical mnemonic forms are used). Therefore, no discussion or examples of the operation of arithmetic shift left instructions are provided.
Example 3.15
Problem: Describe what each of the following instructions accomplishes and then indicate the addressing mode used, the result and resulting status in the CCR, given the following:
0100 24 78 BA 41 93 1F BE FF B $41 CCR $D4
Address Machine Code Source Code a. 0100 57 ASRB
b. 01E3 77 01 06 ASR $0106
Solution:
a. Mode = INH. Nothing in the operand field. Shift right $41, retain the MSB, stuff LSB into C flag. Result $20, C = 1. N = 0, Z = 0, V = 0, C = 1, thus CCR = $D1. b. Mode = EXT. The two bytes in the operand field without # sign. Shift right $BE, retain the MSB, stuff LSB into C flag. Result $DF, C = 0. N = 1, Z = 0, V = 0, C = 0, thus CCR = $D8.
Rotate Instructions
The rotate left (ROL) instructions are responsible for rotating a data word one bit to
the left. The MSB is shifted into the C flag of the CCR, and the LSB is filled with the 81 Mnemonic Description Function IMM DIR EXT INDX INDY INH REL S X H I N Z V C
ASRA ASRB Arithmetic shift right Acc See Figure 3.24 - - - X - - - ] ] ] ]
ASR Arithmetic shift right contents of memory
See Figure 3.24
- - X X X - - - ] ] ] ]
Figure 3.25 Arithmetic Shift Instructions
prior contents of the C flag. In Figure 3.26a, there is an 8-bit data word $37 that will be rotated left. Before the rotate is performed, the C flag in the CCR contains zero. When the rotate left operation is performed, the MSB is shifted into the C flag and the prior value in C is rotated into the LSB from the right. The original 8-bit word is moved one bit position to the left. Thus the resulting data word is $6E and C flag = 0. The rotate right (ROR) instructions are responsible for rotating a data word one bit to the right. The LSB is shifted into the C flag of the CCR, and the MSB is filled with the prior contents of the C flag. In Figure 3.26b, there is an 8-bit data word $37 that will be rotated right. Before the rotate is performed, the C flag in the CCR contains zero. When the rotate left operation is performed, the LSB is shifted into the C flag and the prior value in C is rotated into the MSB from the left. The original 8-bit word is moved one bit position to the right. Thus the resulting data word is $1B and C flag = 1.
There are three versions of the rotate left instruction: ROL, ROLA and ROLB, as shown in Figure 3.27. The ROL operates directly on an 8-bit data word stored at a memory location. It operates in the EXT, INDX and INDY addressing modes. No support is provided for the DIR addressing mode. The ROLA and ROLB instructions operate on the 8-bit data contained in AccA and AccB respectively. They operate in the inherent addressing mode. The rotate left instructions affect four status flags in the CCR: N, Z, V and C reflect the actual condition of the data after the operation. The V bit indicates sign error for these instructions. V = 1 if the sign of the data changed during the rotate operation.
There are three versions of the rotate right instruction: ROR, RORA and RORB, as shown in Figure 3.27. The ROR operates directly on an 8-bit data word stored at a 82 0 0 1 1 0 1 1 1 1 1 0 1 1 1 0 0 C 0 0 $6 0 0 1 1 0 1 1 1 0 0 1 1 0 1 0 0 C 1 1 $1 Before ROL Data = $37, C = 0 After ROL Data = $6E, C = 0 Before ROR Data = $37, C = 0 After ROR Data = $1B, C = 1 b7 b0 $E b7 b0 $B
a) Rotate Left through Carry (C)
b) Rotate Right through Carry (C)
Figure 3.26 Rotate Examples
memory location. It operates in the EXT, INDX and INDY addressing modes. No support is provided for the DIR addressing mode. The RORA and RORB instructions operate on the 8-bit data contained in AccA and AccB respectively. They operate in the inherent addressing mode. The rotate right instructions affect four status flags in the CCR: N, Z, V and C reflect the actual condition of the data after the operation. The V bit indicates sign error for these instructions. V = 1 if the sign of the data changed during the rotate operation.
Example 3.16
Problem: Describe what each of the following instructions accomplishes and then indicate the addressing mode used, the result and resulting status in the CCR, given the following:
0100 24 78 BA 41 93 1F BE FF B $45 CCR $D7
Address Machine Code Source Code a. 0100 56 RORB
b. 01E3 79 01 06 ROL $0106
Solution:
a. Mode = INH. Nothing in the operand field. Rotate right $45, MSB = C, stuff LSB into C flag. Result $A2, C = 1. N = 1, Z = 0, V = 1, C = 1, → CCR = $DB.
b. Mode = EXT. The two bytes in the operand field without # sign. Rotate left $BE, LSB = C, stuff MSB into C flag. Result $7D, C = 1. N = 0, Z = 0, V = 1, C = 1, →
CCR = $D3. 83
Mnemonic Description Function IMM DIR EXT INDX INDY INH REL S X H I N Z V C
ROLA ROLB
Rotate left Acc See Figure 3.26
- - - X - - - ] ] ] ]
ROL Rotate left contents of memory
See Figure 3.26
- - X X X - - - ] ] ] ]
RORA RORB
Rotate right Acc See Figure 3.26
- - - X - - - ] ] ] ]
ROR Rotate right contents of memory
See Figure 3.26
- - X X X - - - ] ] ] ]
Figure 3.27 Rotate Instructions