Double tail latched comparator
High Speed and Low Power Dynamic Latched Comparator for PTL Circuit Applications
10
Analysis & Design of low Power Dynamic latched Double-Tail Comparator
5
Low-voltage Power-efficient Dynamic Latched Comparator
9
Analysis and Design of A Low-Voltage Low-Power Double-Tail Comparator
7
Design and simulation of low power ADC using double tail comparator
7
LOW POWER DESIGN OF DOUBLE TAIL COMPARATOR USING SLEEPY STACK TECHNIQUE
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Performance Improvement of Low Power Double Tail Comparator in UDSM CMOS Technology
6
A Novel High Speed Power Efficient Double Tail Comparator in 180nm CMOS Technology
6
Design of Low Power High Speed Fully Dynamic CMOS Latched Comparator
6
Design of Converter Using a Low Voltage Low Power Double Tail Comparator G Haritha, Dr M Gurunadha Babu & C Santhi
6
Implementation of High Speed Double Tail Comparator
5
A Novel Architecture for Inverter Based Double-Tail Comparator
5
Power Reduction in Dynamic Double Tail Comparator With CMOS
11
Design of High-Speed Dynamic Double-Tail Comparator
12
DESIGN OF HIGH SPEED AND POWER EFFICIENT DOUBLE TAIL COMPARATOR
8
Performance Analysis of Fully Differential Double Tail Dynamic Comparator
10
Low Power Comparator Using Double Tail Gate Technique
5
A Double-Tail Comparator with Reduced Delay and Low Power Dissipation
6
Design and Analysis of Double Tail Comparator using Adiabatic Logic
7
Clocked Low Power High Speed Regenerative Double Tail Comparator
6