high speed digital applications
VLSI design of high-speed adders for digital signal processing applications.
180
A Performance Analaysis of BPSK OFDM System by Novel Based Haar Wavelet
7
Effective Design of an High speed Digital Fault Tolerant Architecture
5
A Low Power VLSI Design of an All Digital Phase Locked Loop
5
HIGH SPEED AND AREA EFFICIENT TRUNCATING MULTIPLIER FOR D.S.P APPLICATIONS
5
Adiabatic Logic Circuits for Low Power, High Speed Applications
8
Implementation of Reversible Vedic Multipliers for High Speed applications
7
DESIGN OF QUATERNARY ADDER FOR HIGH SPEED APPLICATIONS
12
Cosine-Modulated Multitone for Very-High-Speed Digital Subscriber Lines
16
IMPLEMENTATION OF DIGITAL FILTERS FOR HIGH THROUGHPUT APPLICATIONS ON FPGA
6
Digital Ultra Low Voltage High Speed Logic
5
Design an High speed Digital Fault Tolerant Architecture
7
Design Flow Based on Sensitivity Analysis for High-speed Digital Circuits
101
High Speed Symmetric Convolutions based FIR Digital Filter Design
5
Performance improvement in FIR filter using Residue Number System with modulo adders and multipliers
6
OPTIMIZATION OF COMPARATOR FOR HIGH SPEED FLASH ADC
6
196205 pdf
102
196011 12 pdf
104
Sigma Delta Modulators: A Review
9
A 1.2V 8 BIT SAR ANALOG TO DIGITAL CONVERTER IN 90NM CMOS
7