Linear Shift-Register Circuits for Cyclic Encoders
Ortho Linear Feedback Shift Register Cryptographic System
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Reducing Memory Consumption of UART With Linear Feedback Shift Register
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A High Performance Parallel Architecture for Linear Feedback Shift Register
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Leakage Power Optimization of Linear Feedback Shift Register (LFSR)
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Power Optimization of Linear Feedback Shift Register Using Clock Gating
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Design and Analysis of a Linear Feedback Shift Register with Reduced Leakage Power
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VHDL Implementation of UART with Reducing Power Consumption by Linear Feedback Shift Register
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ABSTRACT This paper review of Bit Linear Feedback Shift Register which generates pseudo-random test patterns as
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Design and Analysis of a maximum length 5-Bit Parallel Linear Feedback Shift Register using VHDL Structural Modeling
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Synthesis and Realization of Linear Feedback Shift Register Using Reversible Logic Pokkula Priyanka, P Shubhakar & M Basha
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Linear Feedback Shift Registers and Cyclic Codes in SAGE
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Cyclic combinational circuits
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32 Bit Linear Feedback Shift Register With Power Gating Technique
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A Design and Analysis of Low Power Linear Feedback Shift Register with Clock Gating
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Power Optimization of Linear Feedback Shift Register (LFSR) using Power Gating
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Scan-based Attacks on Linear Feedback Shift Register Based Stream Ciphers
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Constructive Analysis of Cyclic Circuits
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Cyclic Shift Problems on Graphs
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Lightweight Circuits with Shift and Swap
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Passive Linear Circuits
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