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low-power comparator circuit

Transistor Implementation of Reversible Comparator Circuit Using Low Power Technique

Transistor Implementation of Reversible Comparator Circuit Using Low Power Technique

... for power optimization with its application in low power VLSI ...CMOS-GDI circuit which provides the optimal solution for combinational logic, saving 1/3 the power, half the area and ...

6

Design of Low Power Comparator Using DG Gate

Design of Low Power Comparator Using DG Gate

... A good synthesis for reversible logic should not create an excessive “garbage” or “waste of outputs”. Hence, the components are chosen so that the designed scheme has the desired characteristics. One bit ...

6

Low Power High Speed Differential Current Comparator

Low Power High Speed Differential Current Comparator

... current comparator is proposed for enhancing speed and reducing power ...as low as 15nA, with the input current changing at a speed of 100 ...The circuit utilizes Wilson's current mirror ...

7

Design of Low Power High Speed Dynamic Comparator

Design of Low Power High Speed Dynamic Comparator

... proposed comparator is shown in figure6. This comparator can be operated at lower voltage because this circuit has less ...to comparator. Initially, the comparator state is ...

8

Low-voltage Power-efficient Dynamic Latched Comparator

Low-voltage Power-efficient Dynamic Latched Comparator

... dynamic comparator is presented using modified gain stage followed by latch stage for high speed analog-to-digital ...proposed comparator is a modified class AB pre-amplifier which makes it suitable for ...

9

Low Voltage Low Power Current Comparator Using Dtmos

Low Voltage Low Power Current Comparator Using Dtmos

... The functionality of the proposed circuit is verified through LTSPICE simulations. The power supply of ±0.3 V is used .The DC and Transient response results are illustrated in the Figs. 5 and 6. Figure 5 ...

5

A Comparator Circuit Design Using Cyclic Combinational Gate Diffusion Input (CCGDI) - For Low Power, Low Area and High Speed Applications in VLSI Design

A Comparator Circuit Design Using Cyclic Combinational Gate Diffusion Input (CCGDI) - For Low Power, Low Area and High Speed Applications in VLSI Design

... the circuit. For representing the combinational functions into cyclic circuit, two popular methods are available namely: Branch-and-bound algorithm and Karnaugh map ...

10

A Novel Design of Low Power Comparator through Differential Amplifier in 90nm CMOS Technology Using Cadence Tool

A Novel Design of Low Power Comparator through Differential Amplifier in 90nm CMOS Technology Using Cadence Tool

... area, power are very vital parameters for high speed devices like analog to digital ...The comparator circuit with preamplifier increases the power consumption, as it requires large amount of ...

7

Low Power High Speed Dynamic Comparator

Low Power High Speed Dynamic Comparator

... measure the offset of dynamic latch. The comparator circuit consists of a pre amplifier and a latch followed by a output buffer. The offset of preamplifier and latch is store and cancel by using a standard ...

5

Design of High Speed Comparator using DTMOS Technique with low Power Consumption

Design of High Speed Comparator using DTMOS Technique with low Power Consumption

... double-tailed comparator circuits are very faster, usually faster than the conventional ...less power. To speed up the power trade, the comparator circuit is not ...very low ...

6

Design and Analysis of an Ultra Low Power Clocked Regenerative Comparator

Design and Analysis of an Ultra Low Power Clocked Regenerative Comparator

... tail comparator this topology the voltage difference of fn and fp nodes varies exponentially which results in reduction of latch delay ...the circuit is still having the problem of static power ...

8

A High Speed Low Power CMOS Comparator for Pipeline ADC in 180nm Technology

A High Speed Low Power CMOS Comparator for Pipeline ADC in 180nm Technology

... the comparator and dynamic track and latch comparator. The Comparator involves the operational amplifier whereas the proposed comparator uses the track and latch circuit with fully ...

5

Design of Low Power & High Speed Parallel Prefix Comparator

Design of Low Power & High Speed Parallel Prefix Comparator

... speed comparator architecture becomes a relevant and essential research ...the circuit complexity and the combinational delay increase ...The comparator designs presented in this paper are based on ...

6

Analysis and Design of High Speed Low Power Comparator in ADC

Analysis and Design of High Speed Low Power Comparator in ADC

... the comparator circuit is applied by feeding back a small portion of the output voltage to the positive input ...the comparator circuit can prove to be very useful as it reduces the circuit's ...

6

A Double-Tail Comparator with Reduced Delay and Low Power Dissipation

A Double-Tail Comparator with Reduced Delay and Low Power Dissipation

... consumes low power and provides minimum delay while ...double-tail comparator which provides digital signal when analog signal is applied as ...proposed comparator is made up of power ...

6

Design of Low Power Preamplifier Latch Based Comparator

Design of Low Power Preamplifier Latch Based Comparator

... of comparator is to compare two input signals which may be low or high level ...the comparator their voltage level should be sufficient enough to be detected and compared witheach other, so as to ...

8

High Speed and Low Power Dynamic Latched Comparator for PTL Circuit Applications

High Speed and Low Power Dynamic Latched Comparator for PTL Circuit Applications

... latched comparator was designed that works with high speed and low power consumption when compared to double tail latched comparator (conventional comparator 1) and pre amplifier based ...

10

Circuit Design of Low area 8 bit magnitude Comparator With Low Power by Static CMOS

Circuit Design of Low area 8 bit magnitude Comparator With Low Power by Static CMOS

... Comparator is going to compare 8 bits of A(A7 to A0) and 8 bits of B(B7 to B0) and decides whether ALTB(A<B) or ...the circuit for any of the two outputs means only keeping track of when A is less than ...

5

Low Power Comparator Using Double Tail Gate Technique

Low Power Comparator Using Double Tail Gate Technique

... the comparator delay and fully explore the transactions in dynamic comparator ...dynamic comparator is proposed, where the circuit of a predictable double tail comparator is altered for ...

5

Implementation on Low Power Design Using Comparator for VLSI Design Circuit

Implementation on Low Power Design Using Comparator for VLSI Design Circuit

... A 8-bit Flash ADC has been outlined by utilizing the proposed VSV comparator. The outline has been done in computerized 65nm standard CMOS innovation. Further lower peculiarity size and littler supply voltage can ...

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