low-power systems design
Design of dual mode fuzzy logic load frequency controller for interconnected power systems using superconducting magnetic energy storage unit
... in power system ...theory systems introduced by Zadeh and investigated further by many researchers (Dipti Srinivasan et ...expressive power, greater generality, and in improved capability to model ...
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Sub-metering Prototype Design for Low Power Distribution Systems- Part 1
... active power, total harmonic distortion and true power factor values are sent to Arduino which has a Real Time Clock (RTC) module connected to it for the purpose of providing time stamp to the ...the ...
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Design of Low Power and High Speed Correlators for IEEE 802 16 WiMAX Systems
... The proposed sharing technique based correlator and the parallel pre-compute architectures are synthesized us- ing Xilinx ISE 13.2 and mapped on Virtex 6 FPGA (Device-XC6VCX75T, Package-FF484 with the speed grade-2) with ...
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Design and Implementation of High Performance and Low Power Mixed Logic Line Decoders
... operating power and power dissipation, Area and Propagation delay of 2-4 decoder of both low power and high-performance circuits have calculated using Mentor Graphics Pyxis Schematic and Pyxis ...
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Low-Power Design for Embedded Processors
... be power savings by incorporating innovative processes; In the case of embedded systems, the application’s program memory consumes an enormous amount of power that could be obviated by a method which ...
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Power Factor Compensation on Distorted Low Voltage Power Systems
... of power capacitor installation should include harmonic resonance analysis at the design ...distribution power system, such as parallel resonance at harmonic frequencies other than the one targeted ...
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A Low Power Multi-Bit 4TH Order ΔΣ ADC for High Security Application
... to design a low-power delta sigma ADC by using higher order ADC, which is applicable for high resolution image processing systems for security ...the power consumption levels of the ADC ...
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Low Power CAM Cell Design With GDI Based NAND Gate
... networking systems but these are costly & not scaled along the clock rate or area of circuitry compared to ...the design without putting any effect over delay & ...to design for attaining ...
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LOW-POWER HIGH-SPEED CIRCUIT DESIGN FOR VLSI MEMORY SYSTEMS
... future system LSIs, it is understood from the figure that integrating everything on the same die is not a realistic solution for all applications due to high mask count, design and process complexity, and ...
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Low power design for Wireless Meter Reading S...
... Many other powerful features. The CC2530 comes in four different flash versions: CC2530F32/64/128, with 32/64/128/KB of flash memory, respectively. TheCC2530 has various operating modes, making it highly suited for ...
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BASICS OF ENERGY-EFFICIENT DIGITAL DESIGN
... in power being the major concern for digital system ...and power no longer scale proportionally leading to increasing power ...less power dissipation. The less the power dissipation, ...
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Low Power Shift Register Using NAND Gate With 130nm CMOS Design
... minimal power digitized ...of power & area of the circuitry & also minimizes complexity of the ...designed systems by the implementation of gating of ...of power produced as ...
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Review in Low Power VLSI Design
... a power supply that is capable of recovering or recycling energy in the form of electric ...the power supplies of adiabatic logic circuits have used constant current charging (or an approximation thereto), ...
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Design of ABC algorithm based load frequency controller for hydro nuclear interconnected power systems with redox flow batteries
... Over the past decades, various control techniques (Ibraheem et al., 2005; Omveer Singh et al., 2013) such as classical control, variable structure control, optimal control, and robust control, have been applied to the ...
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2.4 GHz Class F Power Amplifier for Healthcare Application
... the scheduled requirements for the CMOS process, but it still has room to improve performance metrics. When the sensor is coupled with communications technologies such as mobile phones and the Internet, the sensor ...
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6. DESIGN OF LOW POWER MULTIPLIERS
... Three-different adders Ripple Carry Adders, Carry Select Adders and the Carry Look Ahead Adders are compared. The basic purpose was to know the time and power trade-offs between different adders which will give a ...
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Analysis and design of a low power ADC
... To prevent this increase in capacitance and increase the matching between the capacitors, a calibration technique is developed. This technique is introduced in the next part (4.1.4 on page 30). The technique makes use of ...
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A Brief Review: Stage Convertible Power Amplifier Using Differential Line Inductor
... CMOS power amplifier has been studied vigorously in an effort to extend battery lifetimes ...the power trans- mitted in a wireless system is below the maximum for most of the transmission time, the average ...
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DESIGN OF HIGH SPEED ALU USING REVERSIBLE LOGIC GATES BASED ON VEDIC MATHEMATICS
... This design has total quantum cost of 23, number of gates required to design multiplier is 5 along with total garbage outputs are 5 and constant inputs are ...
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A Literature Survey on Low PDP Adder Circuits
... The power consumption is reduced by using energy recovery ...at low power supply. This adder cannot work correctly at low voltages and high delay is ...
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