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System on Chip

A Review of System-On-Chip Bus Protocols

A Review of System-On-Chip Bus Protocols

... ABSTRACT: This paper gives a brief description of various on-chip bus protocols such as the Advanced Microcontroller Bus Architecture (AMBA) Advanced High-Performance bus (AHB) and Advanced Extensible Interface ...

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Multimedia Terminal System-on-Chip Design and Simulation

Multimedia Terminal System-on-Chip Design and Simulation

... This paper proposes a design approach based on integrated architectural and system-on-chip (SoC) simulations. The main idea is to have an efficient framework for the design and the evaluation of multimedia ...

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A High Performance System on Chip Bus Design and Verification

A High Performance System on Chip Bus Design and Verification

... With advances in VLSI integration technology, a large number of hardware components can be integrated into a single chip. To provide the communication bandwidth for these components, existing bus-based ...

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Microelectronic System-on-Chip Modeling using Objects and their Relationships

Microelectronic System-on-Chip Modeling using Objects and their Relationships

... of system level design and we present a system engineering methodology that is built upon the definition of objects and their relationships, and their implementations in the context of hardware ...

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A New Mesochronous Clocking Scheme for Synchronization in System-on-Chip

A New Mesochronous Clocking Scheme for Synchronization in System-on-Chip

... A scheme based on mesochronous clocking for synchronization in System-on-Chip and a circuit solution to avoid the metastability failure has been presented. All related circuits in system level and ...

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System on Chip Design Using High Level Synthesis Tools

System on Chip Design Using High Level Synthesis Tools

... of System-on-Chip designs using High-Level Synthesis ...Keywords: System Level Design; High Level Synthesis; Field Programmable Gate Arrays; Fourier Transform ...

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A Generic Framework for Rapid Prototyping of System-on-Chip Designs

A Generic Framework for Rapid Prototyping of System-on-Chip Designs

... modern System-on-Chip (SoC) designs be- comes more and more an important topic because of the benefits in the overall system performance and the design ...

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Design and Optimization of System-on-chip (SOC)

Design and Optimization of System-on-chip (SOC)

... transistors chip, it may not be possible to send a global signal across the chip within real-time ...traditional system designs are usually based on critical paths and clock ...

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System on Chip Platform Based on OpenCores for Telecommunication Applications

System on Chip Platform Based on OpenCores for Telecommunication Applications

... Abstract__ In this paper, we present a platform for system on chip (SoC) implementation that is suited for telecommunication applications. To build the platform, we have adopted the OpenCores-Openhardware ...

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Automatic Verification of UML-based System on Chip Design

Automatic Verification of UML-based System on Chip Design

... Electronic system complexity is being increased every day: each System on Chip (SoC) may be composed by a mix of processors, DSPs, specialized hardware units, and ...the system design can help ...

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System-on-Chip Design and Implementation

System-on-Chip Design and Implementation

... modern System-on-Chip (SoC) is a complex task involving a range of skills and a deep understanding of a hierarchy of perspectives on design, from processor architecture down to signal ...a ...

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Design and Implementation of an On chip Multistage Network Topology for System On Chip

Design and Implementation of an On chip Multistage Network Topology for System On Chip

... Abstract— This paper presents the silicon-proven design of a novel on-chip network to support guaranteed traffic permutation in multiprocessor system-on-chip applications. The proposed network ...

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An Efficient System On-Chip Bus with OCP Interface

An Efficient System On-Chip Bus with OCP Interface

... (System-on-chip) is becoming difficult task not only due to its complexity, but also the design of a more amount of IPs. A consensus interface protocol for IP cores is becoming significant and even ...

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Wobbe meter : A calorific measurement system on chip

Wobbe meter : A calorific measurement system on chip

... the chip in the cleanroom the fabrication steps of the platinum heaters based on the lift-off and the isolation of the core have to be ...the chip should be characterised and calibrated to verify the ...

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A High Performance Clock Distribution Network for System on Chip

A High Performance Clock Distribution Network for System on Chip

... Considering the additional interconnect capacitance (which leads to increased power dissipation), the benefits of zero clock skew may not be worthy of the price. Even if sequentially adjacent registers are located on ...

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DESIGN AND VERIFICATION OF ROBUST ROUTER FOR SYSTEM ON CHIP APPLICATIONS

DESIGN AND VERIFICATION OF ROBUST ROUTER FOR SYSTEM ON CHIP APPLICATIONS

... router system, which is syntasizable and can be extracted on the Xilinx ...the system and a transition from the frontend of the VLSI designing to backend of the VLSI ...the system can be debugged ...

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Implementation of UART with BIST Technique in System-on- Chip (SOC)

Implementation of UART with BIST Technique in System-on- Chip (SOC)

... the chip; shorter test times if the BIST can be designed to test more structures in parallel; easier customer support; and capability to perform tests outside the production electrical testing environment ...

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System-on-Chip Designs Strategy for Success

System-on-Chip Designs Strategy for Success

... As Silicon processing moves into deep sub micron dimensions, physical effects become more prominent. Some of the common effects are Electromigration, IR drop, Cross Talk, 3D noise, antenna effects and EMI effects. As a ...

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Virtual Platforms in System-on-Chip Design

Virtual Platforms in System-on-Chip Design

... a system engineering environment which enables system architects to create and analyze ...during chip hardware development for co-verification of RTL along with software and other components modeled ...

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Clock Domain Crossing Verification in a System on Chip

Clock Domain Crossing Verification in a System on Chip

... Even if static signals are defined as such, it may not be sufficient for this to remove all the false errors in the report. For example, if there is a multiplexer with inputs from different domains. If the mux select ...

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