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very high speed integrated circuits

Crosstalk Interconnect Noise Optimization Technique Using Wire Spacing and Sizing for High Speed Integrated Circuits

Crosstalk Interconnect Noise Optimization Technique Using Wire Spacing and Sizing for High Speed Integrated Circuits

... VLSI circuits to sub-quarter micron and its clock frequency to 3GHz has caused crosstalk noise to become a serious problem that degrades the performance and reliability of high speed ...

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Simulation of interconnections in high speed integrated circuits

Simulation of interconnections in high speed integrated circuits

... At very high frequencies (in the microwave region), the cross sectional dimensions of the line become comparable to the wavelength of the propagating signal, allowing higher order (non TEM) modes to ...

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Reconfigurable Path Restoration Schemes for MPLS Networks

Reconfigurable Path Restoration Schemes for MPLS Networks

... In the work reported in this paper we implement a general algorithm to model the session establishment between several routers inside an MPLS network. In contrast with previous implementations of the MPLS technology, ...

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Low Power BIST based Multiplier Design and Simulation using FPGA

Low Power BIST based Multiplier Design and Simulation using FPGA

... of integrated circuits in t he day-to-day useful electronic gadgets is the driving force for the development of low power designs of configurable hardware ...designs. High speed and low power ...

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High-speed and Robust Integrated Silicon Nanophotonics for On-Chip Interconnects

High-speed and Robust Integrated Silicon Nanophotonics for On-Chip Interconnects

... enable high-speed operation in optical communication systems on silicon ...a high-speed hybrid optical-time-division-multiplexing (OTDM) and wavelength-division-multiplexing (WDM) system, and ...

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Adiabatic Logic Circuits for Low Power,  High Speed Applications

Adiabatic Logic Circuits for Low Power, High Speed Applications

... Since the last few decades, the electronics industry has been growing enormously due to integrated circuit technology. Now, we have come a long way from the single transistor era of 1958 to ULSI (Ultra Large Scale ...

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HIGH SPEED INTEGRATED SIGNALING SYSTEM FOR UNDERGROUND MINES

HIGH SPEED INTEGRATED SIGNALING SYSTEM FOR UNDERGROUND MINES

... effective, high speed integrated circuit designing to cope with the failing of alarming systems inside the ...of high speed data acquisition, processing and decision making ...

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An Integrated Tool For High Speed Circuits with Substrate Coupling.

An Integrated Tool For High Speed Circuits with Substrate Coupling.

... Quasi-optical power combining techniques are a means of combing the power out- put of numerous solid state devices generally in a free space environment. In [6] a review of the various techniques and systems is ...

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Performance Analysis of High Speed Domino CMOS Logic Circuits

Performance Analysis of High Speed Domino CMOS Logic Circuits

... for high-speed arithmetic units, one in all, the challenges in VLSI processor style these days is structured for constructing CLA circuits, exactly for the 8-bit circuits while not limiting ...

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Signal generation and processing in high-frequency / high-speed silicon-based integrated circuits

Signal generation and processing in high-frequency / high-speed silicon-based integrated circuits

... The other promising alternative is quadrature generation using ILFD’s. This can be easily done by driving two identical ILFD’s with a pair of differential signals like using digital dividers, as shown in Fig. 5.23. ...

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High Throughput and High Speed Blowfish Algorithm for Secure Integrated Circuits

High Throughput and High Speed Blowfish Algorithm for Secure Integrated Circuits

... The encryption and decryption modules are integrated in the top level module to obtain the blowfish crypto-processor and the simulation and synthesis results are analyzed. Comparison is done for four forms i.e., ...

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Layout Oriented Design Practice for Capturing Distributed Effects in High-Speed Circuits.

Layout Oriented Design Practice for Capturing Distributed Effects in High-Speed Circuits.

... In a QO system, a large number of active devices are distributed on the grid surface. The grid is excited by a horn and lens system that concentrates the incident field on the grid and polarizers are used to isolate the ...

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RECENT TRENDS OF POWER DELAY FOR LOW POWER & HIGH SPEED VLSI CIRCUITS

RECENT TRENDS OF POWER DELAY FOR LOW POWER & HIGH SPEED VLSI CIRCUITS

... exchanged Capacitance per clock cycle, VDD is the supply voltage, Short-circuit is the short out current and Leakages the spillage current. In a very much enhanced low power VLSI circuits, the 1st ...

7

Design and implementation of FPGA control unit for solar Application

Design and implementation of FPGA control unit for solar Application

... There are two charging stages for the PV charger. A continuous MPPT-charging scheme is adopted at the beginning of the charging process. To obtain an average charging current with an exponential profile a ...

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Cosine-Modulated Multitone for Very-High-Speed Digital Subscriber Lines

Cosine-Modulated Multitone for Very-High-Speed Digital Subscriber Lines

... In recent years, multicarrier modulation (MCM) has at- tracted considerable attention as a practical and viable tech- nology for high-speed data transmission over spectrally shaped noisy channels [1–6]. The ...

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FPGA Based Function Generator

FPGA Based Function Generator

... Both the digital and analog Filter is used to provide the best approximation of an ideal analog signal. During digital to analog conversion, digital filter are used to interpolate the signals to increase the effective ...

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Piggyback Scheme over TCP in Very High Speed Wireless LANs: Review

Piggyback Scheme over TCP in Very High Speed Wireless LANs: Review

... to high error recovery delays, especially over high delay ...over high delay paths, because the SACK option cannot speed up individual ...

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Sensor-less Vector speed Control of Induction motor Drives using MRAS technique.

Sensor-less Vector speed Control of Induction motor Drives using MRAS technique.

... simplest speed estimate technique for controlling induction motor from very low to very high speed ...control speed as per ...a speed estimation algorithm which overcomes ...

5

Application of Reversible Logic in Implement of High Speed Low Power Combinational and Sequential Circuits

Application of Reversible Logic in Implement of High Speed Low Power Combinational and Sequential Circuits

... logic circuits within which main aim is to optimize speed of the ...of speed, vital ways, hardware ...serial circuits are the center of digital planning, the look for the management unit of a ...

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DESIGN HIGH SPEED LOW POWER COMBINATIONAL AND SEQUENTIAL CIRCUITS USING REVERSIBLE DECODER

DESIGN HIGH SPEED LOW POWER COMBINATIONAL AND SEQUENTIAL CIRCUITS USING REVERSIBLE DECODER

... as speed, basic ways, equipment ...successive circuits are the core of computerized outlining, the plan for the control unit of a reversible GCD processor has been proposed utilizing Reversible rationale ...

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