CMOS digital/analog circuits
A 1.2 GHz Band-Pass Sigma Delta Analog to Digital Modulator with Active Inductor based Resonators
... Delta Analog to Digital modulator in IBM ...um CMOS technology. Traditional RLC circuits, with spiral inductors as resonators, were replaced with active inductor based resonators with negative ...
5
A SURVEY ON FINFETS: TECHNOLOGY, PROS, CONS AND IMPROVEMENT PROSPECTS
... whether analog or digital circuits find better applications with ...prefer digital applications over analog due to increased parasitic effects in ...degraded analog performance. ...
9
Guideline on Quantitatively Analyzing Analog Nano-Scale CMOS Circuits Using Ultra-Compact Model
... GD/BD circuits, ultra-compact model which is numerically accurate for nano-scale MOSFET must be ...to digital applications, not optimized for bulk-driven ...
8
A Research Optimization of CMOS Analog Circuits using Modified Particle Swarm Algorithm
... of analog component so that, analog circuit experience high execution time and high ...of analog circuit categorized into (I) information based (ii) progress ...The analog part design is more ...
6
Design of Analog CMOS Circuits for Batteryless Implantable Telemetry Systems
... Layout of the decoder, shown in Fig. 5.6, was designed manually. Power rails of the digital layout are arranged to alternate between VDD and VSS, with alternating rows mirrored upside down. Width of the power ...
103
Analog CMOS Image Sensor-based Radon Counter
... both analog and digital types, which include digital cameras, camera modules, medical imaging equipment, night vision equipment such as thermal imaging devices, radar, sonar, and ...electronic ...
6
Ultra-Low Power Design of Digital CMOS Logic Circuits
... The CMOS logic operates in the subthreshold mode when the power supply voltage( vdd) is less than the transistor threshold voltage (Vt), this ensures that all the transistors are operating in subthreshold ...in ...
5
A 1.2V 8 BIT SAR ANALOG TO DIGITAL CONVERTER IN 90NM CMOS
... which analog electronics has and continuously had , can never be changed or controlled in any kind of application right from old inconsequential deign to high end ...between analog signal and digital ...
7
Power and Area Efficient FLASH ADC Design using 65nm CMOS Technology
... the CMOS technology is continuously scaling down, the design of ultra-high speed wired or wireless communication system is becoming ...advanced digital CMOS technology a challenging aspect for ...
8
ΔIDDQ Testing of a CMOS Digital to Analog Converter Considering Process Variation Effects
... for CMOS data converters fabricated in 0.5 µm n-well CMOS proc- ...The circuits are designed to overcome the problem of increase in absolute value of quiescent current due to increasing background ...
6
AVTS Approach To Digital CMOS Circuits For Diminishing Complete Power Expenditure
... Low power has emerged as a most important argument in today’s electronics engineering industries. They require low power has caused a major paradigm shift where power dissipation has become as important a consideration ...
7
Multi-Objective CMOS-Targeted Evolutionary Hardware for Combinational Digital Circuits
... Here a design is specified using register transfer level equations. Each instruction in the specification is an output signal assignment. A signal is assigned the result of an expression wherein the operators are those ...
11
THE DESIGN OF HIGH PERFORMANCE THREE INPUT XOR GATE BASED ON COMPOUND GATE METHODOLOGY
... activity of the circuits. It is observed that the dynamic realization has more activity than static realizations [2], [3]. The input signal slopes and transistor sizing are strongly effects the short circuit ...
5
Calibration Techniques for Pipelined ADCs
... With this adaptive power/ground architecture eradicates the headroom boundaries due to low power requirement. While considering the signal swing, this technique gives a flat transition between the MDAC stages and the ...
11
Low Power and High Speed 4-Bit Flash Analog to Digital Converter Using Dynamic Latch Comparator Technique
... 1-bit analog to digital converter and for that reason they are mostly used in analog to digital ...an analog voltage with the reference voltage and gives the binary signal output based ...
6
DESIGN OF FRACTAL ANTENNA FOR UWB APPLICATIONS
... In this work, we focus on the use of the two algorithms: Genetic Algorithm and and Ant Colony Optimization; to solve typical analog circuit sizing problems. Two application examples are considered, a positive ...
7
A 4-BIT EXPANDABLE CURRENT- MODE ADC BASED ON DIFFERENT CURRENT COMPARATOR ARCHITECTURES
... Fig. 1 shows the block diagram of the implemented ADC. The input to the ADC is a continuously varying current signal in the range described by {min, max}. Using these min and max values, the whole range is divided into ...
5
SINGLE OTRA BASED PD CONTROLLERS
... In order to verify the theoretical propositions simulations are performed using PSPICE program. For simulation CMOS implementation of the OTRA proposed in [12] was used. The SPICE simulation was performed using ...
12
Reduced Comparator Flash ADC for ECG Applications
... In comparator there are two stages, first stage is composite cascode differential amplifier N channel input devices in series with combination of cascode active PMOS based current mirror load that compares the two input ...
5
Artificial Neural Network for Performance Modeling and Optimization of CMOS Analog Circuits
... This paper presents an implementation of multilayer feed forward neural networks (NN) to optimize CMOS analog circuits. For modeling and design recently neural network computational modules have got ...
7