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current-mode CMOS design

A 4-BIT EXPANDABLE CURRENT- MODE ADC BASED ON DIFFERENT CURRENT COMPARATOR ARCHITECTURES

A 4-BIT EXPANDABLE CURRENT- MODE ADC BASED ON DIFFERENT CURRENT COMPARATOR ARCHITECTURES

... a current comparator. We have implemented the different current comparators suitable for this architecture, each of which has been evaluated in terms of delay and area occupied and hence their effect on the ...

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Third Order Current-Mode Filter Realization using CMOS Current-Mirror

Third Order Current-Mode Filter Realization using CMOS Current-Mirror

... One disadvantage of these op-amp based active RC filters is the limited frequency range of operation over which these circuits can be used: the finite bandwidth of op-amps usually confined the application to be below 100 ...

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DESIGN OF CURRENT MODE MULTIPLIER/DIVIDER CIRCUIT USING A CURRENT DIFFERENCING BUFFERED AMPLIFIER

DESIGN OF CURRENT MODE MULTIPLIER/DIVIDER CIRCUIT USING A CURRENT DIFFERENCING BUFFERED AMPLIFIER

... A design of multiplier/divider circuit using a single Current Differencing Buffered Amplifier (CDBA) is ...the current mode approach is used which is suitable for low voltage high speed analog ...

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Design of Topologies of Current Controlled Current Conveyor in 16 nm Bulk CMOS Technology

Design of Topologies of Current Controlled Current Conveyor in 16 nm Bulk CMOS Technology

... of CMOS to comply with large scale integration and system on chip requirements together with increased demand for portable and battery operated devices, low power low voltage (LP LV) devices are need of the ...The ...

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DESIGN OF VOLTAGE-MODE INSTRUMENTATION AMPLIFIERS FOR ECG SIGNALS USING CMOS TECHNOLOGY

DESIGN OF VOLTAGE-MODE INSTRUMENTATION AMPLIFIERS FOR ECG SIGNALS USING CMOS TECHNOLOGY

... drain current equation for a MOSFET in the saturation region, given in ...tail current is set to 20uA, to minimize the total supply current and to meet the limits on power ...

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Combinational circuits using transmission gate logic for power optimization

Combinational circuits using transmission gate logic for power optimization

... active mode, TGL technique achieves 83% power reduction as compared to the conventional CMOS ...design.125nm CMOS technology is used to simulate outputs in TANNER ...circuit design to ...

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A NOVEL HIGH PRECISION LOW POWER CURRENT MODE CMOS WINNER-TAKE-ALL CIRCUIT

A NOVEL HIGH PRECISION LOW POWER CURRENT MODE CMOS WINNER-TAKE-ALL CIRCUIT

... The design and simulation of winner-take –all Current Mode (WTA) circuit is ...are current and voltage respectively, which makes the circuit appropriated for low voltage neural hardware ...

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High Frequency Oscillator Design Using a Single 45 nm CMOS Current Controlled Current Conveyor (CCCII+) with Minimum Passive Components

High Frequency Oscillator Design Using a Single 45 nm CMOS Current Controlled Current Conveyor (CCCII+) with Minimum Passive Components

... requirements. Current mode (CM) design approach is fast gaining in and establishing a trend setting reputation in the design of the modern day ...various design considerations which are ...

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Design of Energy Efficicent CMOS Current Comparator

Design of Energy Efficicent CMOS Current Comparator

... time current comparator is ...for current-mode applications. Previous reported current comparators present a high-speed response; nevertheless, only few are suitable for low-voltage ...

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Lossy and Lossless Current-mode Integrators using CMOS Current Mirrors

Lossy and Lossless Current-mode Integrators using CMOS Current Mirrors

... both current output devices often the transistors are assembled into voltage oriented circuits and ...of current-mode processing is inherent wide bandwidth capability, and in a current ...

8

Multilevel Sequential Logic Circuit Design

Multilevel Sequential Logic Circuit Design

... In current-mode design, the parameter variations of the components and the noise may result in incorrect logic levels may be obtained, if the number of cascaded stages exceeds a certain ...

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MODIFIED GDI TECHNIQUE - A POWER EFFICIENT METHOD FOR DIGITAL CIRCUIT DESIGN

MODIFIED GDI TECHNIQUE - A POWER EFFICIENT METHOD FOR DIGITAL CIRCUIT DESIGN

... logic design has been recognized as an aggressive substitute to synchronous ...(VLSI) design, jointly by the high density, greater than ever number of gates on chip, and GHz frequencies of ...the ...

22

A New Design Technique of CMOS Current Feed Back Operational Amplifier (CFOA)

A New Design Technique of CMOS Current Feed Back Operational Amplifier (CFOA)

... conventional CMOS CFOA design is still facing certain problems, first, the offset voltage on the current feedback can not be made ...Several CMOS realizations for the CFOA have been reported ...

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HIGH FIDELITY LOW-NOISE AND LOW-POWER AMPLIFIERS (HIFI-LNLPA) FOR DIFFERENT RECEIVERS: A REVIEWAnand Vijay KM*1 , Mohan Kumar S B 2 , Suhas N S 3 & S Devi4

HIGH FIDELITY LOW-NOISE AND LOW-POWER AMPLIFIERS (HIFI-LNLPA) FOR DIFFERENT RECEIVERS: A REVIEWAnand Vijay KM*1 , Mohan Kumar S B 2 , Suhas N S 3 & S Devi4

... A design with low noise amplifier (LNA) performs the initial amplification in the radio frequency (RF) receiver and over an ultra-wideband (UWB) based on the ...RF CMOS process technology and the noise from ...

5

Analysis of CMOS image sensor based time to 
		threshold PWM architecture 
		using current mode logic

Analysis of CMOS image sensor based time to threshold PWM architecture using current mode logic

... The fundamentals of image acquisition sensor architecture based on PWM an extension of pulse modulation (PM). In this construct, the output signal is produced whenever the signal reaches a threshold value. The digital ...

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Dual AGC Model Implementation of the Inner Hair Cell and Auditory Nerve IC in Neuromorphic VLSI

Dual AGC Model Implementation of the Inner Hair Cell and Auditory Nerve IC in Neuromorphic VLSI

... ABSTRACT-An analog inner hair cell and auditory nerve has been implemented for the persons with hearing disabilities. The designed circuit uses fully balanced circuits to reduce the mismatch of the signals that enters ...

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Analysis of Various Low-Voltage High Impedance Gate Driven CMOS Current Mirrors

Analysis of Various Low-Voltage High Impedance Gate Driven CMOS Current Mirrors

... the CMOS technologies, it is possible to integrate baseband signal processing units, sensors and radio-frequency (RF) circuits on a single ...sub-micron CMOS technologies are very apt to fulfil this need, ...

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A CMOS Based Balanced Differential Amplifier with MOS Loads

A CMOS Based Balanced Differential Amplifier with MOS Loads

... The transconductance gm is directly proportional to aspect ratio of MOSFET (W/L). As aspect ratio is reduced, gm gets reduced with increase in gain of MOSFET amplifier at the cost of reduced drain current and ...

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Low-power CMOS rectifier and Chien search design for RFID tags

Low-power CMOS rectifier and Chien search design for RFID tags

... Low-power CMOS rectifier and Chien search design for RFID tags Low-power CMOS rectifier and Chien search design for RFID tags.. Shu-Yi Wong.[r] ...

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Survey and Evaluation of D Flipflop for Low Power Counter Design Using Sub-Micron Technology

Survey and Evaluation of D Flipflop for Low Power Counter Design Using Sub-Micron Technology

... has received his B.E. Degree in Electrical and Electronics Engineering from PSG College of Technology in 1995 and M.E. Degree in VLSI Design from Regional Engineering College (NIT), Trichy, in 2001. He completed ...

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