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Hardware Implementation of Algorithms

Hardware Implementation of a Proposed QR-Tls DOA Estimation Method and MUSIC, ESPRIT Algorithms on Ni-Pxi Platform

Hardware Implementation of a Proposed QR-Tls DOA Estimation Method and MUSIC, ESPRIT Algorithms on Ni-Pxi Platform

... a hardware implementation of a novel DOA estimation method QR-TLS that we have recently proposed in [12] along with two other well known methods called MUSIC and ESPRIT on NI PXI ...

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Development of novel BMIP algorithms for human eyes affected with glaucoma and hardware implementation using VLSI based embedded systems

Development of novel BMIP algorithms for human eyes affected with glaucoma and hardware implementation using VLSI based embedded systems

... software algorithms using some types of transformation techniques& filtering techniques in Matlab/LabVIEW & finally implementing the same using hardware (VLSI techniques) in FPGA, the problem ...

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Analysis and hardware implementation of color map inversion algorithms

Analysis and hardware implementation of color map inversion algorithms

... could models map to a color in the printer's device-dependent for computing the inverse algorithms to requires re-computation of map computing the inverse map thesis required the accurac[r] ...

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Hardware Implementation of LZMA Data Compression Algorithm

Hardware Implementation of LZMA Data Compression Algorithm

... adaptive algorithms tend to adjust quickly to the data stream and will begin turning in respectable compression ratios after only a few thousand ...adaptive algorithms are able to adapt themselves to local ...

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Hardware Implementation of Redundant CORDIC Processors

Hardware Implementation of Redundant CORDIC Processors

... the algorithms used in DSP and matrix arithmetic require elementary functions such as trigonometric, inverse trigonometric, logarithmic, and exponential, multiplication and division functions [5, 6, ...digital ...

5

Hardware Implementation of ZUC Stream Cipher

Hardware Implementation of ZUC Stream Cipher

... of algorithms for confidentiality and integrity the 128- EEA3 and 128-EIA3 ...those algorithms to be used in China, because they were not designed in ...FPGA implementation of ZUC stream cipher is ...

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Evaluating Placement Algorithms with the DREAM Framework for Reconfigurable Hardware Devices

Evaluating Placement Algorithms with the DREAM Framework for Reconfigurable Hardware Devices

... Congurable logic is a viable alternative method to the general purpose processor and the application specic integrated circuit (ASIC) for solving scientic and engineer- ing problems. At one end of the hardware ...

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Hardware Implementation of a Novel Image Compression Algorithm

Hardware Implementation of a Novel Image Compression Algorithm

... compression algorithms involves eliminating redundant data, the amount of loss is determined by the compression ratio, typically about 16:1 with no visible ...

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Hardware Implementation of VLC using CMOS Camera

Hardware Implementation of VLC using CMOS Camera

... computer algorithms to perform image processing on digital ...of algorithms to be applied to the input data and can avoid problems, the build- up of noise and signal distortion during ...

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Compact and High Speed Hardware Implementation of CLEFIA

Compact and High Speed Hardware Implementation of CLEFIA

... compact hardware structures for the computation of the CLEFIA encryption ...well-performance hardware architectures for the 128-bit ...other algorithms. The author designed five types of different ...

9

Hardware Implementation of Block-Cipher Scalable Encryption Algorithm

Hardware Implementation of Block-Cipher Scalable Encryption Algorithm

... The performance analysis of these algorithms can be found in Soren et al., [8] which compares the ciphers based on code size and throughput. The size of the cipher should be small as there is a lot of restriction ...

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Algorithms for Hardware Based Pattern Recognition

Algorithms for Hardware Based Pattern Recognition

... Carsten Diederichs is the Head of the Hardware Design Group at Koenig & Bauer AG, Bielefeld branch. His interests include field-programmable logic design and efficient hardware implementation of ...

9

Metaheuristic Algorithms: Guidelines for Implementation

Metaheuristic Algorithms: Guidelines for Implementation

... In implementing of metaheuristic algorithms, the obtained results are sensitive to algorithms’ parameters. Therefore, the parameters require being fine-tuned in order to obtain solutions with better quality ...

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Efficient Hardware Design and Implementation of AES Cryptosystem

Efficient Hardware Design and Implementation of AES Cryptosystem

... Many algorithms were presented originally with researches from 12 different ...Fifteen algorithms were selected to the Round ...Five algorithms finalized by NIST are MARS, RC6, RIJNDAEL [2], SERPENT ...

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A Novel and Efficient Hardware Implementation of Scalar Point Multiplier

A Novel and Efficient Hardware Implementation of Scalar Point Multiplier

... parallel implementation strategy to reduce the critical path of the Itoh-Tsujii’s Finite-Field Inversion and used the binary graph tree idea to reduce the critical path and the required gates for the ...

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HARDWARE IMPLEMENTATION OF THE PCM CODEC FOR VOIP TELEPHONY

HARDWARE IMPLEMENTATION OF THE PCM CODEC FOR VOIP TELEPHONY

... the hardware-implemented PCM encoder were obtained through simulation using Modelsim XE ...the hardware-implemented PCM encoder correctly compressed the input test ...

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Hardware Implementation of a Time Management Unit (TMU)

Hardware Implementation of a Time Management Unit (TMU)

... a hardware module and integrate it with an existing microcontroller, and possibly synthesize it to run on an ...complete implementation of the ...the hardware using Verilog – only an overview of ...

105

On  Hardware  Implementation  of  Tang-Maitra  Boolean  Functions

On Hardware Implementation of Tang-Maitra Boolean Functions

... From the previous decomposition, we can already observe some of the properties of the hardware combinational circuit and also some simple optimizations. First, the cost of the multiplexer and encoder is small, ...

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Hardware Implementation Of Approximate 2D Gsf In Dibr

Hardware Implementation Of Approximate 2D Gsf In Dibr

... In this proposed Depth Image based rendering approach we are calculating Pixel_Shift. Here Pixel_Shift is use for shift the original pixel value with its depth valure. Aftr the calculation of shift value we are apply ...

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Recurrent Neural Networks Hardware Implementation on FPGA

Recurrent Neural Networks Hardware Implementation on FPGA

... vectors, which can be for the next layer or next time step. The hardware also implements an extra matrix-vector multiplication to generate the final output. This is only used when the last LSTM layer has finished ...

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