low-power arithmetic circuits
Implementation of Low Power Arithmetic Circuits Using Reversible Gates
... have low power and less area which is most important in designing ...In low power arithmetic circuits we have designed circuits using FREDKIN gate, PERES gate and FEYMAN ...
8
Analysis and Design of Low Power Arithmetic Circuits
... with low power consumption is one of the important factor for VLSI circuit ...various arithmetic circuits, such as adder, subtractor, and ...in low power ...design. ...
8
Performance Analysis of High Speed Domino CMOS Logic Circuits
... of low power high performance arithmetic circuits multiplies, during this paper, we aim to introduce a style of latest MT-CMOS domino logic and FTL dynamic logic technique to style adder ...an ...
6
A low power and fast cmos arithmetic logic unit
... This paper gives a review of already existing 3T XOR cells and provides an optimized value of width/length (W/L) on the basis simulation results obtained which helped to improve the driving capability as to improve the ...
38
Design of Low Power Half Adder Using Adaptive Voltage Level (AVL) Technique
... VLSI arithmetic circuits plays a important ...the power consumption compared to other conventional ...total power dissipation by using adaptive voltage level at ground (AVLG) technology in ...
8
Generalizing Homomorphic MACs for Arithmetic Circuits
... In terms of realizations, Gennaro and Wichs [28] proposed a fully homo- morphic MAC scheme that achieves all the above three properties for arbitrary programs. On the negative side, their construction is unfortunately ...
18
Designing of Low Power Low Area Arithmetic and Logic Unit
... systems power dissipation is very high due to rapid switching of internal ...or circuits allow the Reproduction of the inputs from observed outputs and we can determine the inputs from the ...as low ...
6
Low Power Modified Feed-Through Logic Circuit for Ultra-low Voltage Arithmetic Circuits
... digital circuits FTL gives advantage of smaller power consumption compared to any other logic families in ...for low power arithmetic, pipelining and filter circuit design over ...
5
A Review on Low Power Compressors for High Speed Arithmetic Circuits
... and power consumption of the Wallace tree multiplier and it is accomplished by using 4-2 and 5-2 compressors and a proposed carry select ...of low power, low transistor count and minimum delay ...
6
THE DESIGN OF HIGH PERFORMANCE THREE INPUT XOR GATE BASED ON COMPOUND GATE METHODOLOGY
... of low power, high performance arithmetic circuits, which are predominantly used in portable devices and today’s advanced VLSI chip design [1], [2], especially applications like Artificial ...
5
Analysis of Power Processing Circuits for Low Power Energy Harvesting Applications
... The power electronic circuits are employed to 1) regulate the power delivered to the load, and 2) actively manage the electrical damping of the transducers so that maximum power could be ...
6
Learning Restricted Models of Arithmetic Circuits
... notably arithmetic circuits. An arithmetic circuit syntactically represents a multivariate polynomial in the obvious way: a multiplication (addition) gate outputs the product (sum) of the polynomials ...
22
Practical Homomorphic MACs for Arithmetic Circuits
... Abstract. Homomorphic message authenticators allow the holder of a (public) evaluation key to perform computations over previously authenticated data, in such a way that the produced tag σ can be used to certify the ...
30
Non-Commutative Arithmetic Circuits with Division
... 2p. Then m must be at least p + 1, which shows that m grows with s. On the other hand, assume that Φ contains only one inverse gate computing g −1 , for some polynomial g of degree k. Then m can be taken ≤ k/2 + 1. A ...
37
Universal Pattern Set for Arithmetic Circuits
... the arithmetic circuits. For ripple carry adder circuits we achieve 100% fault coverage and for other circuits we are getting fault coverage more than 95% except the Wallace multiplier ...
5
An Asynchronous Approach for Designing Robust Low Power Circuits
... accurate power measurements (to consider current flowing through the input ...different power supply is provided to the inverters which make sure that power measurements are done accurately for the ...
131
Ultra Low Power Designing for CMOS Sequential Circuits
... performance. Power reduction has become an important issue in digital circuit design, especially for high performance portable devices (such as cell phones, PDAs, ...Many power reduction techniques have ...
8
Low Power and Area Efficient Design of VLSI Circuits
... Dual VT technique is a variation in MTCMOS,in which the gates in the criticalpath use low-threshold transistors and high-thresholdt ransistors for gates in non- criticalpath[3],[7].Both the methods requires ...
5
Low Power Design Techniques in CMOS Circuits : A Review
... Leakage Control Transistor (LECTOR) is another way to be used as a low power retention technique. In this approach, two extra LCTs: a pMOS and an nMOS are inserted within the circuit. It is a kind of drain ...
8
Low Power Interconnect Circuits using Silicon Carriers
... the output pad at the driver and input pad at the receiver, due to the capacitive loads, which cause some mismatch in the termination of the interconnect. From the figure, the ‘one’ and ‘zero’ levels can be estimated to ...
75