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low-power circuit applications

Power Dissipation Analysis of Memristor for Low Power Integrated Circuit Applications

Power Dissipation Analysis of Memristor for Low Power Integrated Circuit Applications

... many applications of memristor have been presented (e.g., synapse circuit [3], content addressable memory [4], and dynamic memory ...the circuit configuration and the simulation/implementation ...

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Designing Of A New Low Voltage Cmos Schmitt Trigger  Circuit And Its Applications On Reduce Power Dissipation

Designing Of A New Low Voltage Cmos Schmitt Trigger Circuit And Its Applications On Reduce Power Dissipation

... Schmitt circuit is a general inverter circuitry (double transistor inverter) with two extra transistors for providing the ...from low or low from high when after the ON condition of M2 or M4 ...

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Design of Low Power CMOS Based PTAT/R Circuit for TDC (Temperature-to-Digital Converter) Applications

Design of Low Power CMOS Based PTAT/R Circuit for TDC (Temperature-to-Digital Converter) Applications

... The basic PTAT/R circuit used in the sensing frontend design is discussed here for TDC (Temperature-to-Digital Converter) applications. This section discusses the design of Temperature-to-Digital ...

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A Gate Diffused Input Based CMOS Full Adder Circuit for Low Power, High Speed Applications

A Gate Diffused Input Based CMOS Full Adder Circuit for Low Power, High Speed Applications

... VLSI applications, for arithmetic operations mostly adder is used so in other words, we can say that adder is the heart of VLSI design ...system applications affects directly. Here recently in past few ...

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An Improved Low Power, High Speed CMOS Adder Design for Multiplier

An Improved Low Power, High Speed CMOS Adder Design for Multiplier

... adder circuit for high speed and low power applications is proposed in this paper at 90 nm technology node with supply voltage ...carry circuit separately. The adder circuit ...

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Low power custom circuit building using standard cells with reduced 
		leakage by applying Gate Length Biasing technique for high end computing 
		applications

Low power custom circuit building using standard cells with reduced leakage by applying Gate Length Biasing technique for high end computing applications

... The delay penalty in the design is overcome by using a technique called the selective gate length biasing [6]. Here the gate length biased standard cells are used only on paths that aren’t included in the critical path ...

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Design & Simulation of Low Power Analog to Digital Converter for Medical Applications

Design & Simulation of Low Power Analog to Digital Converter for Medical Applications

... period. Low power dissipation and high performance of static characteristic have been obtained by using dynamic comparator ...of circuit-driven techniques the presentation focuses on highlighting the ...

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A Comparator Circuit Design Using Cyclic Combinational Gate Diffusion Input (CCGDI) - For Low Power, Low Area and High Speed Applications in VLSI Design

A Comparator Circuit Design Using Cyclic Combinational Gate Diffusion Input (CCGDI) - For Low Power, Low Area and High Speed Applications in VLSI Design

... Once the cyclic functions are found the next approach is to represent those cyclic Boolean functions with GDI cell. After getting the required CCGDI expressions for the combinational functions the functional and timing ...

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Low Voltage Low Power Applications Of 3T Gain Cell

Low Voltage Low Power Applications Of 3T Gain Cell

... standby power of ultralow-power (ULP) systems, such as biomedical implants and wireless sensor networks, is often dominated by embedded memories, which continue to leak during the long retentive standby ...

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LNA for Low-Power, Low Data Rate PAN Applications

LNA for Low-Power, Low Data Rate PAN Applications

... A circuit simulation can determine the most suitable tran- sistor size. Fig. 3 depicts the cadence simulation result of a MOSFET with W = 600 µm and L = 0.25 µm. A bias cur- rent of 831 µA allows a ...

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A Low-Loss Operation of Boost-Based Power Factor Correction Circuit by using Auxiliary ZVT Circuit

A Low-Loss Operation of Boost-Based Power Factor Correction Circuit by using Auxiliary ZVT Circuit

... boost-based Power Factor Correction (PFC) converter is designed with a low loss auxiliary Zero-Voltage-Transition (ZVT) circuit which operates at 10 kHz frequency and it is suitable for on-board ...

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Low Voltage and Low Power Divide-By- 2-3 Counter Design Using Pass Transistor Logic Circuit Technique

Low Voltage and Low Power Divide-By- 2-3 Counter Design Using Pass Transistor Logic Circuit Technique

... designs adopt dynamic logic FFs such as true-single-phase clock (TSPC) [2]–[4]. The designs can be further enhanced by using extended true-single-phase-clock (E-TSPC) FFs for high speed and low power ...

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Design of New Low Leakage Power Domino XOR Circuit

Design of New Low Leakage Power Domino XOR Circuit

... VLSI applications such as microprocessors [1], adders [2] ...area, power consumption increases while speed ...Domino circuit consists of clocked pull up and footer transistor, and the pull down ...

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Low Power Full Adder Circuit Implemented In Different Logic

Low Power Full Adder Circuit Implemented In Different Logic

... Designing low-power VLSI systems is significant because of the fast growing technology in mobile computation and ...less power consumption and higher performance and ...reduce power ...

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Flyback Converter Design and Simulation

Flyback Converter Design and Simulation

... SMPS circuit for low output power applications where the output voltage needs to be isolated from the input main ...output power of fly-back type SMPS circuits may vary from few watts ...

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An Efficient Adiabatic CMOS Circuit Design Approach for Low Power Applications

An Efficient Adiabatic CMOS Circuit Design Approach for Low Power Applications

... CMOS circuit design is the large amount of power being dissipated in the ...implement low power dissipating ...the circuit, adiabatic logic families can achieve very low ...

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Efficient Implementation of Fault Coverage Circuit for High Speed and Low Power Applications

Efficient Implementation of Fault Coverage Circuit for High Speed and Low Power Applications

... and power dissipation. Due to switching i.e. the power consumed testing, due to short circuit current flow and charging of load area, reliability and ...These applications require low ...

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Low-Power Low-Noise CTIA Readout Integrated Circuit Design for Thermal Imaging Applications

Low-Power Low-Noise CTIA Readout Integrated Circuit Design for Thermal Imaging Applications

... CDS circuit was 70μm*108μm. The PVT variation analysis studied all circuit specifications under the variation of process, voltage, and temperature ...

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Optimized Low Power Circuit for Sar –Adc In Medical Applications

Optimized Low Power Circuit for Sar –Adc In Medical Applications

... the power consumption values of individual circuits for different inputs was ...the power consumption of ...previous circuit. In this project we can say that by our design power consumption ...

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Subthreshold Circuit Design Techniques for Ultra Low-Power Applications

Subthreshold Circuit Design Techniques for Ultra Low-Power Applications

... In STSCL circuit, NMOS Differential pair is the main part of the circuit which implements the logic operation of the circuit. The basic STSCL Inverter is shown below in figure 1 which consist of two ...

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