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low power combinational logic circuits

Application of Reversible Logic in Implement of High Speed Low Power Combinational and Sequential Circuits

Application of Reversible Logic in Implement of High Speed Low Power Combinational and Sequential Circuits

... Reversible logic has conferred itself as a distinguished technology that plays an essential role in Quantum ...reversible logic to interrupt the traditional speed-power trade- off, thereby obtaining ...

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Design and Comparison of Low Power High
Performance Online Testable Combinational
Circuits with Different Reversible Logic Gates

Design and Comparison of Low Power High Performance Online Testable Combinational Circuits with Different Reversible Logic Gates

... are circuits (gates) in which there is a one-to-one mapping between vectors of inputs and ...These circuits can generate unique output vector from each input vector, and vice versa, that is, there is a ...

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1.
													   design of low voltage, low power and high speed logic gates using modified gdi technique

1. design of low voltage, low power and high speed logic gates using modified gdi technique

... theory, combinational circuits sometimes called as time independent logic is a type of digital logic which is implemented by Boolean circuits, where the output is a pure function of the ...

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A Review: Design and Analysis of Multi-Valued Logic for Quaternary Combinational Circuits

A Review: Design and Analysis of Multi-Valued Logic for Quaternary Combinational Circuits

... i..e logic level checker also called as quaternary encoder is the main circuit of the project which avoids all types of conversions ...various circuits such as subtractor, multiplier ...

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Design of High Speed Power Efficient Combinational and Sequential Circuits Using Reversible Logic
Basthana Kumari & J Deepthi

Design of High Speed Power Efficient Combinational and Sequential Circuits Using Reversible Logic Basthana Kumari & J Deepthi

... Reversible logic is widely used in low power VLSI for higher speed of ...Reversible circuits are capable of back-computation and reduction in dissipated power, as there is no loss of ...

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Design And Implementation Of Low Power Combinational Circuits On FPGA Using Reversible Encoder And Decoder In Vivado

Design And Implementation Of Low Power Combinational Circuits On FPGA Using Reversible Encoder And Decoder In Vivado

... reverse logic is one of the most demanding and helpful ...of combinational circuits like adder, ...decoder circuits with minimum quantum cost. There are many reversible logic gates like ...

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Leakage current and power reduction techniques in combinational circuits

Leakage current and power reduction techniques in combinational circuits

... This is done by placing the alternating sleep transistors either on pull- up or pull- down networks and will be off for a given specific input vector. In Zigzag keeper approach, it can be noticed that sleep transistor is ...

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DESIGN HIGH SPEED LOW POWER COMBINATIONAL AND SEQUENTIAL CIRCUITS USING REVERSIBLE DECODER

DESIGN HIGH SPEED LOW POWER COMBINATIONAL AND SEQUENTIAL CIRCUITS USING REVERSIBLE DECODER

... Reversible logic has presented itself as a prominent technology which plays an imperative role in Quantum ...reversible logic to break the conventional speed-power trade-off, thereby getting a step ...

5

Combinational Logic Circuits Design Using Reversible Logic Gate

Combinational Logic Circuits Design Using Reversible Logic Gate

... reversible logic concept work efficiently if number of garbage outputs, constant inputs and quantum cost is ...The power dissipation is zero if the reversible logic circuits are implemented ...

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Analysis of Combinational Circuits using Positive Feed Back Adiabatic Logic

Analysis of Combinational Circuits using Positive Feed Back Adiabatic Logic

... in low-power VLSI design have been steadily increasing as the devices become battery-operated, smaller, and require more functionality ...of low power consumption and hence heat dissipation ...

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Adiabatic Logic Circuits for Low Power,  High Speed Applications

Adiabatic Logic Circuits for Low Power, High Speed Applications

... made power dissipation an important design parameter in modern ...their power consumption. Until now, power consumption was not the greatest concern because of the availability of large packages and ...

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Effect of leakage power reduction techniques on combinational circuits

Effect of leakage power reduction techniques on combinational circuits

... In this technique has been shown which sleep transistor approach with NMOS, PMOS is and NMOS sleep transistors are used for leakage power reduction and an extra NMOS is added. Because sleep transistor technique is ...

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THE DESIGN OF HIGH PERFORMANCE THREE INPUT XOR GATE BASED ON COMPOUND GATE METHODOLOGY

THE DESIGN OF HIGH PERFORMANCE THREE INPUT XOR GATE BASED ON COMPOUND GATE METHODOLOGY

... of low power, high performance arithmetic circuits, which are predominantly used in portable devices and today’s advanced VLSI chip design [1], [2], especially applications like Artificial ...

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A Low Power Decoding Circuitry for a Multi Channel Data Acquisition System using Gate Diffusion Input

A Low Power Decoding Circuitry for a Multi Channel Data Acquisition System using Gate Diffusion Input

... PTL implementations have certain disadvantages. In a single channel pass transistor the threshold drop reduces current drive and lowers the speed of operation at reduced supply voltages which is very important for ...

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Cyclic  Locking   and  Memristor-based  Obfuscation  Against  CycSAT   and  Inside  Foundry  Attacks

Cyclic Locking and Memristor-based Obfuscation Against CycSAT and Inside Foundry Attacks

... acyclic combinational circuits allows the attacker to infer the correct values of the key inputs using only a small number of input-output observations taken from an activated ...

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Comparative Analysis of Low Power Adiabatic Logic Circuits in DSM Technology

Comparative Analysis of Low Power Adiabatic Logic Circuits in DSM Technology

... Recovery Logic (ECRL) [5], as shown in ...AC power clock ...at low. At the beginning of a cycle, when power clock ‗pck‘ rises from zero to VDD, Out remains at low level because the high ...

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Design of Low Power Energy Efficient CMOS Circuits with Adiabatic Logic

Design of Low Power Energy Efficient CMOS Circuits with Adiabatic Logic

... CMOS is the basic unit of the digital circuits. Within the drain of nMOS and pMOS in pull down and pull up section networks is the output of the circuit obtained. The switching activity in CMOS, ...

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Performance Evaluation in Adiabatic Logic
Circuits for Low Power VLSI Design

Performance Evaluation in Adiabatic Logic Circuits for Low Power VLSI Design

... of circuits have been ...average power dissipation for the 2n- 2N2P, ECRL, PFAL and DCDB-PFAL logic circuits have been ...lowest power dissipation achieved using proposed DCDB- PFAL ...

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Design and Comparative Analysis of EEAL Sequential Circuit for Low Power VLSI Application

Design and Comparative Analysis of EEAL Sequential Circuit for Low Power VLSI Application

... sequential circuits have got strong validation and give low power dissipation at low frequencies ...that power consumption with the proposed logic is for less as compared to ...

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Design and Implementation of Adiabatic based Low Power Logic Circuits

Design and Implementation of Adiabatic based Low Power Logic Circuits

... on low power circuits rather than only high performances circuit, with the advancement of technology in last few years there is a dramatic shift in the approach of the industry researcher to come up ...

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