[PDF] Top 20 Characterization of High-k Dielectrics and Interfaces on Device Reliability
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Characterization of High-k Dielectrics and Interfaces on Device Reliability
... gate dielectrics [3]. In addition, logic chip groups requiring high performance of devices such as central processing units for computers also need the high-k dielectrics for boost of ... See full document
144
Electrical characterization of different high k dielectrics with tungsten silicide in vertical double gate NMOS structure
... MOSFET device requires an increased capacitance gate dielectric to control the short channel effects such as hot carrier degradation [2, ...several device designs and reducing the gate oxide thickness ... See full document
8
Investigation of MOS Interfaces with Atomic-Layer-Deposited High-k Gate Dielectrics on III-V Semiconductors.
... their high gate leakage due to schottky contact for the ...exhibit high gate- leakage, low drive current to off-state current ratio and usually a “normally on” ... See full document
222
Investigation of High-k Dielectrics and Metal Gate Electrodes for Non-volatile Memory Applications.
... the device structures need to be scaled down ...and high-k dielectrics as the gate and interpoly dielectrics respectively, seem to be promising substitutes in order to continue the ... See full document
247
Characterization of High-k gate dielectrics based on HfO2 and TiO2 for CMOS Application
... reduced gate thickness and delay, but lead to increased gate-leakage current with thin dielectric layers. 1 In addition, decreased channel length may cause the short- channel effect (SCE) that brings up standby ... See full document
106
Heavy-ion-induced breakdown in ultra-thin gate oxides and high- k dielectrics
... in high-power ...commercial reliability concerns de- ...native dielectrics with unknown breakdown properties have all exacerbated concerns related to oxide degradation and prema- ture failure under ... See full document
9
Accurate modeling of gate capacitance in deep submicron MOSFETs with high K gate dielectrics
... Current scaling of metal-oxide-semiconductor (MOS) field-effect transistor (FET) feature sizes has led to the fabrication of devices in deep sub-100 nm regime with gate-oxide thickness equal to or less than 1 nm. In such ... See full document
6
Polycrystallization effects on the nanoscale electrical properties of high k dielectrics
... other high-k dielectric materi- als [1]. However, high-k-based devices still show some drawbacks, and therefore to have a better knowledge of their properties and to improve their performance, ... See full document
9
Spectroscopic characterization of high k dielectrics: Applications to interface electronic structure and stability against chemical phase separation
... spectroscopic characterization of high k materials under consideration for replacing Si oxide as the gate dielectric in Si-based microelectronic devices has been ...earth-based dielectrics, ... See full document
8
The interfaces of lanthanum oxide based subnanometer EOT gate dielectrics
... the high-k silicides are ...the high-k materials including hafnium oxide and lan- thanum oxide are only marginally stable against the for- mation of ...The device properties can be ... See full document
5
Interaction of Metal Gatew with High-K Gate Dielectrics in Advanced CMOS Devices
... [23] Hobbs, C.C.,Fonseca, L.R.C., Knizhnik, A.; Dhandapani, V.; Samavedam, S.B.; Taylor, W.J.; Grant, J.M.; Dip, L.G.; Triyoso, D.H.; Hegde, R.I.; Gilmer, D.C.; Garcia, R.; Roan, D.; Lovejoy, M.L.; Rai, R.S.; Hebert, ... See full document
258
Device Fabrication and Characterization for Alternative Gate Stack Devices
... deposited high-K layers, it is suspected that defects and traps may also affect the conduction mechanism, ...many high-K materials and the need to achieve high mobility, most deposited ... See full document
183
Intrinsic limitations on ultimate device performance and reliability at (i) semiconductor-dielectric interfaces and (ii) internal interfaces in stacked dielectrics
... integral component of this interfacial oxide, the processing and characterization of these interfacial layers will be ad- dressed in some detail. The thickness of the plasma- processed interfacial layers has been ... See full document
8
Spectroscopic and Electrical Studies of Hafnium-Based High-k Thin Film Dielectrics on Germanium Surfaces
... abrupt interfaces with the high-κ film is no longer ...annealing, interfaces are blunted, the well is no longer well-defined (excuse the pun), and the kinking effect is ...other device quality ... See full document
345
Bonding constraint-induced defect formation at Si-dielectric interfaces and internal interfaces in dual-layer gate dielectrics
... the device exhibiting the higher current was prepared by remote plasma processes that resulted in a non-nitrided interface, whereas 共 ii 兲 the device exhibiting reduced tunneling current was prepared by ... See full document
7
Manuscript Title & Authors
... With the rapid development of the semiconductor industry, the feature size of the devices always follows Moore's law. That means the feature size of the devices is gradually decreasing, and the quality and function of ... See full document
5
Metaphor-Based Design of High-Throughput Screening Process Interfaces
... Although the scenarios used with each interface were designed to be similar in steps, task performance with the prototype and the SAMI® editors was not identical (from a functional perspective) because of certain ... See full document
21
Interface reactions during processing of chemical vapor deposited yttrium oxide high-k dielectrics
... groups have reported results that demonstrate oxidation of the silicon substrate during deposition or during post-deposition anneals. Such silicon consumption reactions are particularly detrimental, in part, because they ... See full document
233
Ultra High Vacuum Physical Vapor Deposition of Yttrium Aluminate and Hafnium Aluminate High-k Dielectrics on Silicon
... and high-k interface. Since very thin films (20-50 Å) of high-k dielectrics are important to the CMOS industry, the ellipsometry must be combined with other methods for thickness ... See full document
83
A Holistic Investigation of Alternative Gate Stack Materials for Future CMOS Applications
... a device performance perspective, the most important property of the gate electrode is its work function at the dielectric ...the device, by controlling how much applied voltage is necessary to bring about ... See full document
136
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