Floating Point
Quantifying the impact of single bit flips on floating point arithmetic
... using floating point exceptions, and, more importantly, 2) for the methods presented in this paper NaN or Inf will propagate to the solution where they are a clear indicator that something is ...
13
Implementation of Double Precision Floating Point Multiplier on FPGA
... Mostly, Floating Point arithmetics[2] are having wider dynamic range and accuracy because of this feature they are used in application specific systems like ...DSP[3]. Floating Point ...
5
Realization of Building Blocks of Floating Point Butterfly Architecture
... applying floating-point (FP) arithmetic to FFT architectures, expressly butterfly units, has become more popular ...fused floating-point operations and applies them to the implementation of ...
6
Implementation of a Fast Binary Floating Point Dadda Multiplier
... binary floating point multiplier based on Dadda ...existing floating point multipliers. The floating point multiplier is developed to handle the underflow and overflow ...Xilinx ...
11
A Unified Reconfigurable CORDIC Processor for Floating-Point Arithmetic
... Abstract: This paper presents a unified reconfigurable coordinate rotation digital computer (CORDIC) processor for floating-point arithmetic. It can be configured to operate in multi-mode to achieve a ...
12
Double Precision Floating Point Multiplier using Verilog
... infiguring floating point numbers representation as single precision (32-bit) and double precision (64-bit) floating point ...64-bit floating point to abstain from losing ...
5
Designing and Improvement of a New Reversible Floating Point Adder
... A floating point number is normalized if the most significant bit of the mantissa is non-zero. In normalization unit, if a shift is needed, it is either one place right shift or several places left shift. ...
7
Building Better Bit-Blasting for Floating-Point Problems
... converted floating-point constraints directly into Boolean problems ...simulate floating- point support for integer only tools [48] but is far from a satisfactory approach as the algorithms ...
27
Trans-Floating-Point Arithmetic Removes Nine Quadrillion Redundancies From 64-bit IEEE 754 Floating-Point Arithmetic
... 754 floating-point arithmetic com- putes k/(−0) = −∞ in a single execution path and trans- floating-point arithmetic switches to a second execution path to compute −k/0 = ...754 ...
6
FPGA Implementation of Single Precision Floating Point Adder
... and floating- point mathematical ...a floating-point unit and offers major delay while taking significant ...many floating-point adder algorithms mainly aimed to reduce the ...
6
Basics of Floating-Point Quantization
... the floating-point quantizer with a source of additive independent ...the floating-point quantizer with a source of additive independent ...
49
Floating point sparse matrix vector multiply for FPGAs
... Modern FPGAs are typically used to solve computations for large problems using off-chip memory. Our approach is to utilize high memory throughput by using on-chip memory. For large matrices we use many parallel ...
51
Pipelined Floating Point Multiplier Based On Vedic Multiplication Technique
... based floating point representation. Multiplying floating point numbers is a critical requirement for DSP applications involving large dynamic ...Pipelined Floating Point ...
8
Single Precision Floating Point Arithmetic using VHDL Coding
... standard floating point adder ...input floating –point operands, N1 and N2, ...standard floating point adder algorithm is as ...
6
Discrete Fourier Transform Design Using Floating Point Numbers
... use floating point IEEE754 format in large number of ...paper Floating point arithmetic design and DIT FFT design is ...The floating point operation is considered are addition, ...
6
JPEG2000 Compatible Lossless Coding of Floating-Point Data
... In floating- point bit-plane coding, all the useful coefficient informa- tion is contained in only a fraction of the bit ...the floating-point algorithm includes the concept of turning o ff the ...
8
Design and Implementation of low power Floating Point Multiplier
... When an overflow occurs an overflow flag signal goes high and the result turns to ±Infinity (sign determined according to the sign of the floating point multiplier inputs). When an underflow occurs an ...
9
A Power-Efficient Floating-point Co-processor design
... be floating- point arithmetic, graphics, signal processing, string processing, or ...to floating-point machine code operation codes inserted in the 8088 instruction ...
7
A Low Power Design Of Floating Point Multiply Add Unit
... input floating point numbers that were initially converted to IEEE – 754 Standard ...of floating point numbers and then compare their ...
5
The pitfalls of verifying floating-point computations
... performing floating-point computations: for instance, an isolated floating-point addition will be performed as a sequence of two loads from double-precision operands, addition with the result ...
41