Floating Point Arithmetic, Errors
First steps towards more numerical reproducibility*
10
Optimal controller and filter realizations using finite precision, floating point arithmetic
9
Implementation of Optimized Floating Point Arithmetic Unit on Reconfigurable Logic Sonam Pardhi, Nitesh Dodkey
8
Quantifying the impact of single bit flips on floating point arithmetic
13
A Note on the Perturbation of arithmetic expressions Shawki A.M. Abbas
8
Floating point roundoff error analysis of the adaptive exponential sliding window RLS algorithm for time-varying systems in the presence of noise
51
Discrete Fourier Transform Design Using Floating Point Numbers
6
A Novel Hardware Efficient Reconfigurable 32-Bit Arithmetic Unit for Binary, BCD and Floating Point Operands
16
HR 04027 Cray Y MP EL Functional Description Aug92 pdf
138
Development of a Block Floating Point Interval ALU for DSP and Control Applications
142
Lightweight Floating Point Arithmetic: Case Study of Inverse Discrete Cosine Transform
14
Design and Implementation of IEEE 754 Addition and Subtraction for Floating Point Arithmetic Logic Unit
7
FPGA-based model implementation for real-time control of smart material systems operating in hysteretic regimes
9
Realization of Building Blocks of Floating Point Butterfly Architecture
6
IMPLEMENTATION OF HIGH SPEED DOUBLE PRECISION FLOATING POINT UNIT ON FPGA USING VHDL
9
G26 5595 0 Automatic Floating Point Operations Sep61 pdf
15
Symbolic round-off error between floating-point and fixed-point
10
Improved Architecture for Floating Point Addition
8
SECompSyllabus-after-peerReview-13April09.pdf
29
VLSI Implementation of Neural Network
10