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high-performance processor architecture

Design and architecture of Intels core i7 processor

Design and architecture of Intels core i7 processor

... desktop processor extreme edition series and Intel core i7-900 desktop processor series are intended for high performance high –end desktop, uni- processor server and workstation ...

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Performance Analysis of On-Chip Memory Architecture Exploration of Embedded Processor

Performance Analysis of On-Chip Memory Architecture Exploration of Embedded Processor

... the performance as well as the energy dissipation of the memory ...is high, thereby discouraging the partitioning algorithm from assigning them to the same ...

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The RTL design of 32-bit RISC processor using verilog HDL

The RTL design of 32-bit RISC processor using verilog HDL

... RISC processor throughput is improved by implementation of the pipeline mechanism that brings the processor to achieve a high performance in speed because all the operations are done by the ...

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A High-Performance Geospatial Architecture for Geosimulations.

A High-Performance Geospatial Architecture for Geosimulations.

... In static HPC environments, where an application cannot scale out to use new resources, efficient use of existing computational resources is required to achieve faster job execution. Adaptive Mesh Refinement is one such ...

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Compiler Optimization for SIMD type Vector Processor

Compiler Optimization for SIMD type Vector Processor

... Abstract— Performance of the processor can be enhanced by parallelization of instructions in terms of ...Vector Processor. SIMD type vector processor is a high performance ...

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Review: Utilization of Multicore System for Security Framework

Review: Utilization of Multicore System for Security Framework

... in performance and speed, processor power & energy consumption have become key challenges in the design of future high- performance ...multicore architecture where all cores execute ...

6

High Performance Cache Architecture Using Victim Cache

High Performance Cache Architecture Using Victim Cache

... proposed architecture takes advantage of a number of extra victim lines that can be associated with cache sets that experience more conflict misses, for a given ...cache architecture, three modules are ...

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High Throughput CORDIC Architecture Based 3D DCT/IDCT Processor

High Throughput CORDIC Architecture Based 3D DCT/IDCT Processor

... 3D-DCT/IDCT processor based on CORDIC architecture for high data rate of image processing and video coding with reduced hardware has been ...DCT processor i.e. one is 1D-DCT and another one is ...

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A Novel Methodology on Optimizing the Performance of Multi core Processor Using FPGA

A Novel Methodology on Optimizing the Performance of Multi core Processor Using FPGA

... higher performance requirements, multi-core processors (MP) have become widely used in various ...multi- processor System-on-Chip (MPSoC) received focus because of its high integration level and low ...

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Implementing High Performance Lexical Analyzer using CELL Broadband Engine Processor

Implementing High Performance Lexical Analyzer using CELL Broadband Engine Processor

... for performance gains in older compilers as technology ...multicore architecture relies on improving parallelism than on improving single core ...the performance of a compiler is majorly affected by ...

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High-performance Architecture of Network Intrusion Prevention Systems

High-performance Architecture of Network Intrusion Prevention Systems

... Network processor is an emerging field of programmable processors that are optimized to implement ...processing architecture where its NP devices complement genera purpose multi-core ...Network ...

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High-Performance Monitor for A Network Processor

High-Performance Monitor for A Network Processor

... network processor, suppress malicious behavior, and reset the processor to a usable state for processing of subsequent ...monitor architecture that evaluates correct network processor ...

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Real-time Intrusion Detection using Multidimensional Sequence-to-Sequence Machine Learning and Adaptive Stream Processing

Real-time Intrusion Detection using Multidimensional Sequence-to-Sequence Machine Learning and Adaptive Stream Processing

... stream processor “Wisdom” were proposed to build an IDS for both anomaly- based and signature-based intrusion ...stream processor with the ability to adapt itself, start new rules to add more features and ...

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High Performance VLSI Architecture of NII Metric Compression Turbo Decoding Architecture

High Performance VLSI Architecture of NII Metric Compression Turbo Decoding Architecture

... A beginning NII metric putting away plan has been proposed for lessening the memory ordinant transcriptions of turbo decoders. By putting away the exact reaches rather than the individually compressed metrics, the ...

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Design And Development Of A Low Power Compact Integrated Processor Of An Embedded System

Design And Development Of A Low Power Compact Integrated Processor Of An Embedded System

... Chapter 2 is describing about literature review of project. In part of that, we explained about the topologies of different processor from the journals or articles that are related to the project. Besides that, ...

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Processor Architecture

Processor Architecture

... A processor register is a computer memory that provides quick access to the data currently being used for processing. The ALU stores all temporary results and the final result in the processor registers. ...

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Watt Community Rowing Center High-Performance Athletes Yield High-Performance Architecture

Watt Community Rowing Center High-Performance Athletes Yield High-Performance Architecture

... W CRC provides a foundation for the creation of sustainable strategy and energy reuse. The kinetic energy generated by rowers during indoor rowing conditioning on Concept 2 rowing machines will be converted into ...

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FPGA implementation of a wireless sensor node.

FPGA implementation of a wireless sensor node.

... typical architecture of this kind of sensor ...or processor with external memory, a wireless communication subsystem for communication with other nodes and a sensor module w ith a set of ...purpose ...

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Low-Overhead Designs for Secure Uniprocessor and Multiprocessor Architectures

Low-Overhead Designs for Secure Uniprocessor and Multiprocessor Architectures

... in the context of utility or on-demand computing where a company owning large systems will “lease” computational and storage resources of the system to customers who want to outsource their IT operations or who need more ...

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MCM Based FIR Filter Architecture for High Performance

MCM Based FIR Filter Architecture for High Performance

... FINITE impulse response (FIR) filters are of great importance in digital signal processing (DSP) systems since their characteristics in linear-phase and feed- forward implementations make them very useful for building ...

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