• No results found

high-speed FPGA devices

Low Power BIST based Multiplier Design and Simulation using FPGA

Low Power BIST based Multiplier Design and Simulation using FPGA

... A paper with FPGA based N-bit LFSR to generate random sequence number design is proposed in [5]. This design presents study the performance and analysis of the behavior of randomness in LFSR. A review of LP-TPG ...

6

Design and Implementation of High Speed FPGA Configuration using SBI

Design and Implementation of High Speed FPGA Configuration using SBI

... ABSTRACT:- FPGA technology is used in all kinds of high speed devices now, which also need so many demands in Quick configuration of FPGA at runtime is the latest ...

8

Implementing High-Speed Interfaces with MachXO2 Devices

Implementing High-Speed Interfaces with MachXO2 Devices

... supported high-speed DDR ...the FPGA resources in addition to the built-in I/O gearing logic and alignment ...the FPGA side to build the bit alignment ...

70

High speed micromouse servo controller based on DSP and FPGA

High speed micromouse servo controller based on DSP and FPGA

... the FPGA to generate the output instead of ...a high resolution counters, the duty cycle of a square wave is modulated so that it will encode a specific analog signal level on ...switching devices is ...

8

A High-Speed FPGA Implementation of an RSD-Based ECC Processor

A High-Speed FPGA Implementation of an RSD-Based ECC Processor

... few devices, perhaps as many as ten diodes, transistors, resistors and capacitors, making it possible to fabricate one or more logic gates on a single ...to devices with hundreds of logic gates, known as ...

18

DTMOS Based Low Power High Speed Interconnects for FPGA

DTMOS Based Low Power High Speed Interconnects for FPGA

... of FPGA is a vital design objective for portable devices such as mobile communication and bio-medical applications where low power dissipation is as important as the performance ...causes high DC ...

6

Design and implementation of high speed optimized sdram controller based on FPGA for PCI interface

Design and implementation of high speed optimized sdram controller based on FPGA for PCI interface

... electronic devices used these days make use of memory element to perform various ...of high resolution camera or even satellite are in need of memory as per the ...the devices has thrown challenges ...

5

Altera High Speed Mezzanine Card HSMC breakout adapter ZX106, ZX107 Breakout boards in Cyclone III development systems

Altera High Speed Mezzanine Card HSMC breakout adapter ZX106, ZX107 Breakout boards in Cyclone III development systems

... Altera High Speed Mezzanine Card ( HSMC ) specification defines the electrical and mechanical properties of high speed mezzanine card adapter interface for FPGA-based motherboards ...

7

MODELING OF LOW POWER SERIAL INTERFACE TO HIGH SPEED ETHERNET ON FPGA

MODELING OF LOW POWER SERIAL INTERFACE TO HIGH SPEED ETHERNET ON FPGA

... flexible FPGA programming feature, a UART and EMAC can be designed in ...serial devices and Ethernet. When Gateway receives data from devices, it will choose useful data from serial data frame ...

9

A Timing Synchronization Algorithm in Ultra high speed System Based on FPGA

A Timing Synchronization Algorithm in Ultra high speed System Based on FPGA

... In the digital communication system [1], there is a clock error between the receiver clock and the transmitter clock, and the relative motion of the receiver and the transmitter will also bring the Doppler bias [2]. This ...

9

Development and Testing of VHDL Interfaces for High Speed Memory Buffering and Data Transmission on FPGA Development Kit for High Speed Digitizer

Development and Testing of VHDL Interfaces for High Speed Memory Buffering and Data Transmission on FPGA Development Kit for High Speed Digitizer

... We are writing interrupt service routine (ISR) for the DMA Controller to put the status register zero after each DMA transfer cycle completes to start new transfer again. Software often communicates with peripheral ...

9

Beacon Initiated Reconfigurable SDR Controller on FPGA for High Speed Communication System

Beacon Initiated Reconfigurable SDR Controller on FPGA for High Speed Communication System

... based devices, for example ...on devices that act as a simulated satellite with signal correction ...with high battery consumption remains an obstacle from adopting these solutions to a broad range ...

8

A High Speed FPGA Implementation of an ECSMA Based Elliptic Curve Crypto Processor

A High Speed FPGA Implementation of an ECSMA Based Elliptic Curve Crypto Processor

... The Internet revolution in the last decade has enabled the success of e-commerce or electronic commerce over the world. The initial idea of e-commerce involves the conducting of business communication and transaction ...

8

High Speed SPI Slave Implementation in FPGA using Verilog HDL

High Speed SPI Slave Implementation in FPGA using Verilog HDL

... SPI Devices communicate in full duplex mode in Master-Slave architecture with a single ...operating speed is very high. The designed SPI Slave in FPGA will communicate with a DSP at relatively ...

5

FPGA based High Speed CRC Encoder and Decoder

FPGA based High Speed CRC Encoder and Decoder

... storage devices, such as a disk ...using FPGA in case of CRC ...at high speed, since most of method currently employed based on look up table consume more time ,more space and also there will ...

6

THE EFFECT OF INTERFERENCE FROM LOCOMOTIVE HIGH SPEED SIGNALING DEVICES

THE EFFECT OF INTERFERENCE FROM LOCOMOTIVE HIGH SPEED SIGNALING DEVICES

... Рассмотрены вопросы влияния помех на устройства СЦБ от локомотивов большой скорости.. The questions of influencing of hindrances on the STSB devices from the locomotives of high speed ar[r] ...

6

Design of High-Speed Parallel Data Interface Based on ARM & FPGA

Design of High-Speed Parallel Data Interface Based on ARM & FPGA

... and FPGA communication will definitely involves the synchronous problems of data transmission in asynchronous clock domain and this is called metastability problems ...that FPGA is internal integrated with ...

6

FPGA Implementation of High Speed Architecture of CSLA using D-Latches

FPGA Implementation of High Speed Architecture of CSLA using D-Latches

... Abstract— Carry Select Adder (CSLA) is one of the fastest adders used in many data-processing processors to perform fast arithmetic functions. The CSLA is used in many systems to overcome the problem of carry propagation ...

13

FPGA Implementation of Novel High Speed Vedic Multiplier

FPGA Implementation of Novel High Speed Vedic Multiplier

... the speed of multiplication and addition determines the execution speed and overall performance of ALU, the high speed multiplier is therefore ...criteria: speed, power and ...the ...

7

FPGA Implementation of High Speed MAC Unit

FPGA Implementation of High Speed MAC Unit

... computational speed and performance plays a pivotal role as they are widely used in filtering, convolution, DWT circuits, signal coding and optical communication system, multimedia information ...A high ...

7

Show all 10000 documents...

Related subjects