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Reconfigurable Hardware

BitCryptor:  Bit-Serialized  Compact  Crypto  Engine  on  Reconfigurable  Hardware

BitCryptor: Bit-Serialized Compact Crypto Engine on Reconfigurable Hardware

... Abstract. There is a significant effort in building lightweight cryp- tographic operations, yet the proposed solutions are typically single- purpose modules that can implement a single functionality. In contrast, we ...

17

Hiding  Higher-Order  Side-Channel  Leakage -  Randomizing  Cryptographic  Implementations  in  Reconfigurable  Hardware

Hiding Higher-Order Side-Channel Leakage - Randomizing Cryptographic Implementations in Reconfigurable Hardware

... Previous Work: Although the threat of side-channel attacks is well known, many cryptographic devices are vulnerable to side-channel analysis due to their static design and behavior which allows attacks based on ...

16

A Reconfigurable Hardware Architecture for VPN MPLS based Services

A Reconfigurable Hardware Architecture for VPN MPLS based Services

... Hardware is normally implemented on application specific integrated circuits (ASICs) or programmable logic devices (PLDs). An ASIC is an integrated circuit customized for a particular use. They are relatively ...

146

Design and Implementation of Digital Linear Control Systems on Reconfigurable Hardware

Design and Implementation of Digital Linear Control Systems on Reconfigurable Hardware

... application-specific hardware is often unavoidable to provide sufficient compu- tational ...dedicated hardware is very inflexible since it is impossible to adapt the implementation on changing re- quirements, ...

9

Performance Analysis of Floating Point Adder using VHDL on Reconfigurable Hardware

Performance Analysis of Floating Point Adder using VHDL on Reconfigurable Hardware

... Floating point operations are hard to implement on reconfigurable hardware i.e. on FPGAs because of their complexity of their algorithms. On the other hand, many scientific problems require floating point ...

5

ABSTRACT: In this paper presents a resource efficient reconfigurable hardware implementation of AES algorithm

ABSTRACT: In this paper presents a resource efficient reconfigurable hardware implementation of AES algorithm

... efficient reconfigurable hardware implementation of AES algorithm using HLL approach on FPGA for rapid ...and hardware/software co-design implementation ...

5

Frequent Itemset Matching for Real Time Applications using Reconfigurable Hardware Architecture

Frequent Itemset Matching for Real Time Applications using Reconfigurable Hardware Architecture

... Data mining process gives useful information and provides interesting hidden information about the database since the data mining is also called knowledge data discovery. There are many techniques and several algorithms ...

5

Hexarray: A Novel Self-Reconfigurable Hardware System

Hexarray: A Novel Self-Reconfigurable Hardware System

... The proposed reconfigurable hardware core is a systolic array, which is called HexAr- ray. HexArray was constructed using processing elements with a redesigned architecture, called HexCells, which provide ...

237

Analysis, optimization, and
design of a SLAM solution
for an implementation on
reconfigurable hardware
(FPGA) using CλaSH

Analysis, optimization, and design of a SLAM solution for an implementation on reconfigurable hardware (FPGA) using CλaSH

... create reconfigurable hardware architectures which could be more efficient in terms of energy compared to standard computer systems because it has parallel ...an hardware description language ...

181

Feasibility Analysis of MPEG decoding on reconfigurable hardware

Feasibility Analysis of MPEG decoding on reconfigurable hardware

... the reconfigurable hardware and the interfaces of both ...and reconfigurable processing ...real hardware to demonstrate the results of the project. The hardware is the Basic Concept ...

99

Compiling Recursion to Reconfigurable Hardware using CLaSH

Compiling Recursion to Reconfigurable Hardware using CLaSH

... on reconfigurable hardware like an Field pro- grammable gate array (FPGA) is not ...on hardware (FPGA) is done by Mihhailov et ...on reconfigurable hardware, the speed of some sim- ple ...

5

Accelerating  Homomorphic  Evaluation  on  Reconfigurable  Hardware

Accelerating Homomorphic Evaluation on Reconfigurable Hardware

... A homomorphic encryption scheme enables a third party to perform meaningful computation on en- crypted data and a prime example for an application is the outsourcing of a computational task into an untrusted cloud ...

22

An Overview of Reconfigurable Hardware for Efficient Implementation of DSP Algorithms Mahesh Kadam 1, Kishor Sawarkar2

An Overview of Reconfigurable Hardware for Efficient Implementation of DSP Algorithms Mahesh Kadam 1, Kishor Sawarkar2

... - Reconfigurable hardware is emerging as the best option for the efficient implementation of complex and computationally expensive signal processing ...algorithms. Reconfigurable hardware ...

10

Analysis of Reed Solomon error correcting codes
on reconfigurable hardware

Analysis of Reed Solomon error correcting codes on reconfigurable hardware

... On the PC the code was executed under Microsoft Windows XP whilst minimizing the amount of other processes. The implementation for the ARM was executed on BasOs [19]. To minimize overhead of the operating system, the ...

79

Layered Protocol Wrappers for Internet Packet Processing in Reconfigurable Hardware

Layered Protocol Wrappers for Internet Packet Processing in Reconfigurable Hardware

... We have presented a framework for IP packet processing applications in hardware. Although our current implemen- tation was created for use in the Field Programmable Port Extender, the framework is very general and ...

5

Layered Protocol Wrappers for Internet Packet Processing in Reconfigurable Hardware

Layered Protocol Wrappers for Internet Packet Processing in Reconfigurable Hardware

... A library of layered protocol wrappers has been devel- oped that process Interent packets in reconfigurable hard- ware. These wrappers can be used with a reprogrammable network platform called the Field ...

5

Reconfigurable hardware for color space conversion

Reconfigurable hardware for color space conversion

... The matrix-based approach has been implemented in different kinds of hardware. Ben- saali et al. [3] present an FPGA-based architecture for RGB to YCrCb color space conver- sion that offers a speedup of 100 ...

67

Design of Low Power Consumption and Area Efficient Modified Carry Select Adder with D-Latch on a Reconfigurable Hardware

Design of Low Power Consumption and Area Efficient Modified Carry Select Adder with D-Latch on a Reconfigurable Hardware

... In the example, the first (least-significant) block consists of a simple full adder, followed by a 3-bit carry- select block, and finally a 4-bit carry-select block. A common choice for a 16-bit carry-select adder is to ...

10

Phased array processing: direction of arrival estimation on reconfigurable hardware

Phased array processing: direction of arrival estimation on reconfigurable hardware

... CORDIC A CORDIC algorithm [3, 21] is an algorithm to calculate hyper- bolic and trigonometric functions. The algorithm requires addition, subtrac- tion, bitshift and table lookup operations. The algorithm is originally ...

85

Physical Unclonable Function Reliability on Reconfigurable Hardware and Reliability Degradation with Temperature and Supply Voltage Variations

Physical Unclonable Function Reliability on Reconfigurable Hardware and Reliability Degradation with Temperature and Supply Voltage Variations

... of hardware built can be lost at any ...the hardware module, design moves from one point to another as shown in Figure ...combining hardware, software, and products from multiple ...

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