transistor-level circuit design
Transistor Modeling using Advanced Circuit Simulator Technology
108
Standard Cell Transistor Level ATPG Coverage
5
Comparative Study of Implementation of 8 Bit Carry Select Adder using Different Technologies
6
Design and Analysis of a Bootstrap Ramp Generator Circuit Based on a Bipolar Junction Transistor (BJT) Differential Pair Amplifier
5
Design and Analysis of MCML Carry Circuit with and without Sleep Transistor for Compressor Circuit Applications
6
Transistor Implementation Of Reversible Gate Using Novel 3 Transistor EX-OR Gate
6
Analysis and Design of Low Power Arithmetic Circuits
8
A Fast, Numerical Circuit Level Model of Carbon Nanotube Transistor
6
A Survey of the Low Power Design Techniques at the Circuit Level
8
Adiabatic Logic Modelling using VHDL
6
Design of Low Power Level Shifter Circuit with Sleep Transistor Using MultiSupply Voltage Scheme
8
1. Analysis of 6t-sram cell designs using mos and fgmos for low power applications
8
Low Power Full Adder With Reduced Transistor Count
5
Performance Improvement of Low Power and Fast Full Adder by Exploring New XOR and XNOR Gates
14
Study of Timing Characteristics of NOT Gate Transistor Level Circuit Implemented Using Nano MOSFET by Analyzing Sub Band Potential Energy Profile and Current Voltage Characteristic of Quasi Ballistic Transport
12
An Efficient Implementation of Low Power Three Input Xor/Xnor Gate
7
Performance Analysis of Various Adder Circuits on 180nm Technology
5
Low-Power Adder Design Using Full-Swing Gate Diffusion Input Logic
7
Analogue Electronic Trainer (BJT)
24
Power supply issues in e-health monitoring applications
5