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transistor-level circuit design

Transistor Modeling using Advanced Circuit Simulator Technology

Transistor Modeling using Advanced Circuit Simulator Technology

... abstraction level of RF and microwave theory and techniques has increased ...OO design, good OO practice can be implemented in more conventional programming languages such as ...example, circuit ...

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Standard Cell Transistor Level ATPG Coverage

Standard Cell Transistor Level ATPG Coverage

... poor design or careless handling Till now, for stuck at fault coverage, the major idea is to present a gate level model to the automatic test pattern generator including the cell-aware library modeling ...

5

Comparative Study of Implementation of 8 Bit Carry Select Adder using Different Technologies

Comparative Study of Implementation of 8 Bit Carry Select Adder using Different Technologies

... pass transistor design, the MOSFET is acting as a voltage controlled switch which passes the logic connected to the drain terminal to its source terminal as shown in figure ...the circuit is off, and ...

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Design and Analysis of a Bootstrap Ramp Generator Circuit Based on a Bipolar Junction Transistor (BJT) Differential Pair Amplifier

Design and Analysis of a Bootstrap Ramp Generator Circuit Based on a Bipolar Junction Transistor (BJT) Differential Pair Amplifier

... that transistor will try to increase its current level and hence lift the voltage present at its ...bipolar transistor depends upon its base-emitter voltage, the result is that the emitter current of ...

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Design and Analysis of MCML Carry Circuit with and without Sleep Transistor for Compressor Circuit Applications

Design and Analysis of MCML Carry Circuit with and without Sleep Transistor for Compressor Circuit Applications

... These implementations have been compared with compressor architectures those make use exclusively of three-level MCML gates. This investigation has shown that the compressors that use exclusively three input MCML ...

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Transistor Implementation Of Reversible Gate Using Novel 3 Transistor EX-OR Gate

Transistor Implementation Of Reversible Gate Using Novel 3 Transistor EX-OR Gate

... The design of VLSI systems with less power dissipation has become an area of intense research ...the design of such a low power systems undoubtedly requires the efficient designing ...logical level ...

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Analysis and Design of Low Power Arithmetic Circuits

Analysis and Design of Low Power Arithmetic Circuits

... 8X8 design is realized in a three different logic styles with the help of MUX based full adder, pass-transistor logic, and 2-T ...the circuit but work presented in this project will achieve good ...

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A Fast, Numerical Circuit Level Model of Carbon Nanotube Transistor

A Fast, Numerical Circuit Level Model of Carbon Nanotube Transistor

... electronic circuit design that include development of fast and accurate CN FET models with the aim to enable cir- cuits with large numbers of such devices to be simulated efficiently and ...

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A Survey of the Low Power Design Techniques at the Circuit Level

A Survey of the Low Power Design Techniques at the Circuit Level

... the circuit level of organization, many techniques are ...includes transistor sizing, reordering, logic optimization, activity driven power down, low swing and adiabatic ...the Transistor ...

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Adiabatic Logic Modelling using VHDL

Adiabatic Logic Modelling using VHDL

... a transistor when there is a voltage potential between the source and drain and never turning off a transistor when current is flowing through ...to design and simulate also ...early design ...

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Design of Low Power Level Shifter Circuit with Sleep Transistor Using MultiSupply Voltage Scheme

Design of Low Power Level Shifter Circuit with Sleep Transistor Using MultiSupply Voltage Scheme

... The Level shifter in the system is mainly used for fast and wide range voltage conversion in Multi Supply Vol- tage Domain ...of level shifter cir- cuit. These circuit which gives robust voltage ...

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1.
													Analysis of 6t-sram cell designs using  mos and fgmos for low power applications

1. Analysis of 6t-sram cell designs using mos and fgmos for low power applications

... sleep transistor technique , the sleep transistor are used at two different position ,one pMOS transistor and one nMOS transistor in series with the transistors of cell so that virtual ground ...

8

Low Power Full Adder With Reduced Transistor Count

Low Power Full Adder With Reduced Transistor Count

... This design is based on complementary pull up and pull down ...the design was improved with 16 transistors and maintains full output voltage swing ...pass transistor logic (CPL) full adder [3] ...

5

Performance Improvement of Low Power and Fast Full Adder by Exploring New XOR and XNOR Gates

Performance Improvement of Low Power and Fast Full Adder by Exploring New XOR and XNOR Gates

... The electronic systems are inseparable part of every life. Recently, the industries are demand for low power, less area and high speed for designing the circuits. With improvement in technology and the enlargement of ...

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Study of Timing Characteristics of NOT Gate Transistor Level Circuit Implemented Using Nano MOSFET by Analyzing Sub Band Potential Energy Profile and Current Voltage Characteristic of Quasi Ballistic Transport

Study of Timing Characteristics of NOT Gate Transistor Level Circuit Implemented Using Nano MOSFET by Analyzing Sub Band Potential Energy Profile and Current Voltage Characteristic of Quasi Ballistic Transport

... Gate Transistor Level Circuit Im- plemented Using Nano-MOSFET by Ana- lyzing Sub-Band Potential Energy Profile and Current-Voltage Characteristic of Qua- si-Ballistic ...

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An Efficient Implementation of Low Power Three Input Xor/Xnor Gate

An Efficient Implementation of Low Power Three Input Xor/Xnor Gate

... In this section, we will see the three- input XOR/XNOR circuits to examine their high performance[ 16]. In complementary CMOS logic [16], the pull-down and pull-up networks used in the circuit perform the function ...

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Performance Analysis of Various Adder Circuits on 180nm Technology

Performance Analysis of Various Adder Circuits on 180nm Technology

... every circuit which does complex computation requires a full adder ...the circuit and delay in adder circuit in order to maintain overall performance of the circuit ...

5

Low-Power Adder Design Using Full-Swing Gate Diffusion Input Logic

Low-Power Adder Design Using Full-Swing Gate Diffusion Input Logic

... VLSI design has important role in designing of many electronic design ...the circuit are the important parameters to be considered ...the design of adders like ripple carry adder, carry look ...

7

Analogue Electronic Trainer (BJT)

Analogue Electronic Trainer (BJT)

... Normally, the available trainers in the market are designed with a mounted component. Thus, the design is fixed for the consequent trainer. Unfortunately, while experimenting, the module should be followed by the ...

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Power supply issues in e-health monitoring applications

Power supply issues in e-health monitoring applications

... In the meantime, significant reductions in power consumption may be achieved by, for example reducing the duty cycle of sensors, reducing the data sampling rate, reducing the MCU processor clock speed; and reducing the ...

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