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floating-point arithmetic operations

Secure  Floating-Point  Arithmetic   and  Private  Satellite  Collision  Analysis

Secure Floating-Point Arithmetic and Private Satellite Collision Analysis

... floating point arithmetic operations on top of a secure multiparty computation ...these floating point algorithms can be ported to other secure com- putation ...

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Implementation of Single Precision Floating Point Processor Using Residue Number System

Implementation of Single Precision Floating Point Processor Using Residue Number System

... of floating point unit has lot of application in real time embedded ...of floating point ...precision floating point processor using residue number system (RNS) in ...both ...

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Quantifying the impact of single bit flips on floating point arithmetic

Quantifying the impact of single bit flips on floating point arithmetic

... Bit flips are commonly thought to only occur ex- tremely rarely during arithmetic operations inside of arithmetic and logic units (ALUs) and floating-point units (FPUs). This belief is ...

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A Unified Reconfigurable CORDIC Processor for Floating-Point Arithmetic

A Unified Reconfigurable CORDIC Processor for Floating-Point Arithmetic

... for floating-point ...of operations and replaces multiple single-mode CORDIC ...different operations, which maximizes the sharing of common hardware circuit and achieves the ...unified ...

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Single Precision Floating Point Arithmetic using VHDL Coding

Single Precision Floating Point Arithmetic using VHDL Coding

... competitive floating-point operation implementation is done by ...precision floating-point addition was implemented for Altera FPGA ...precision floating-point adder ...

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Optimised Delay and Area Efficient Floating Point Arithmetic Unit

Optimised Delay and Area Efficient Floating Point Arithmetic Unit

... for floating point arithmetic when area cannot be ...than floating point hardware unit because they increase the throughput andrequire less area, when the area is ...an floating ...

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Design of a Fused Multiply Add Floating Point and Integer Datapath

Design of a Fused Multiply Add Floating Point and Integer Datapath

... add/subtract operations can easily be derived from multiply-add (A×1+C and ...a floating-point unit. Division, square root, integer/floating-point conversion and comparison instructions ...

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A Note on the Perturbation of arithmetic expressions

Shawki A.M. Abbas

A Note on the Perturbation of arithmetic expressions Shawki A.M. Abbas

... elementary arithmetic operations, +, -, *, /, and "built-in" function occurring in the floatingpoint arithmetic of ...an arithmetic operation or ...

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Lightweight Floating Point Arithmetic: Case Study of Inverse Discrete Cosine Transform

Lightweight Floating Point Arithmetic: Case Study of Inverse Discrete Cosine Transform

... the arithmetic operations of FP need to deal with three parts (sign, exponent, fraction) individually, which adds substan- tially to the complexity of the hardware, especially in the as- pect of power ...

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G26 5595 0 Automatic Floating Point Operations Sep61 pdf

G26 5595 0 Automatic Floating Point Operations Sep61 pdf

... Four are for arithmetic computations; floating add, floating subtract, floating multiply, and floating divide; three control field size and location: floating shift right, floating shift[r] ...

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Realization of Building Blocks of Floating Point Butterfly Architecture

Realization of Building Blocks of Floating Point Butterfly Architecture

... Basically, a barrel shifter works to shift data by incremental stages which avoids extra clocks to the register and reduces the time spent shifting or rotating data (the specified number of bits are moved/shifted/rotated ...

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Area and power performance analysis of floating point  ALU using pipelining

Area and power performance analysis of floating point  ALU using pipelining

... floating point is utilized with FPGA (field programmable array) it has area and power and timing examination overhead over fixed ...point. Floating point can in like manner be used as a ...

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IMPLEMENTATION OF HIGH SPEED DOUBLE PRECISION FLOATING POINT UNIT ON FPGA USING VHDL

IMPLEMENTATION OF HIGH SPEED DOUBLE PRECISION FLOATING POINT UNIT ON FPGA USING VHDL

... Floating point arithmetic unit is an important and integral part of signal and image processing ...For floating point operations, two types of precision units ...basic ...

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FPGA-based model implementation for real-time control of smart material systems operating in hysteretic regimes

FPGA-based model implementation for real-time control of smart material systems operating in hysteretic regimes

... single arithmetic operations to be done in parallel, if desired, and then ...integer arithmetic is preferable, where possible, to floating point arithmetic; the use of integer ...

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Fpga implementation of Floating-Point Arithmetic

Fpga implementation of Floating-Point Arithmetic

... Dividend exponent. This removes the bias, which must be added back in. Tests are then made for exponent underflow or overflow. The next step is to divide the significands. It is followed with the usual normalization. The ...

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Improved Architecture for Floating Point Addition

Improved Architecture for Floating Point Addition

... using floating point addition. Floating point arithmetic differentiated from fixed point arithmetic by its constant relative precision over a wide dynamic ...range. ...

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Implementation of Double Precision Floating Point Arithmetic

Implementation of Double Precision Floating Point Arithmetic

... The placed and routed design for the multiplier and adder are shown in Fig 5.5 and Fig 5.6. Xilinx ISE 8.2i provides means to implement the design and realize it on the FPGA by providing functions for translation, ...

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Development of a Block Floating Point Interval ALU for DSP and Control Applications

Development of a Block Floating Point Interval ALU for DSP and Control Applications

... BFP arithmetic using CBFS approaches that of conventional floating point arithmetic in which the results of the operations are normalized after the ...

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HR 04027 Cray Y MP EL Functional Description Aug92 pdf

HR 04027 Cray Y MP EL Functional Description Aug92 pdf

... Addition algorithm, floating point, 2-19--2-20 Address and multiply range errors, floating-point, 2-18 Address add functional unit CPU, 2-8 integer arithmetic, 2-63 Address base and limi[r] ...

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Symbolic round-off error between floating-point and fixed-point

Symbolic round-off error between floating-point and fixed-point

... To verify our result, we wrote a test program for both rounding methods that generates 100.000.000 random test cases for −1 ≤ x ≤ 3 and − 10 ≤ y ≤ 10 and directly computes the round-o ff error between ...

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