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low-power digital signal processor

Synthesization of Low Power Digital Signal Processor Architecture

Synthesization of Low Power Digital Signal Processor Architecture

... In existing method binary tree is used. The disadvantages of this method is at a time only one node act as root nodes, other node act as leaves. So at a time only one data is send. Hence the power as well as ...

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Modified Han Carlson Adder Based Multiply Accumulate Unit for Low Power Digital Signal Processor

Modified Han Carlson Adder Based Multiply Accumulate Unit for Low Power Digital Signal Processor

... a power efficient Digital Signal Processor ...the power consumption as well as the power-delay ...the power consumption and the figure of merit (power-delay ...a ...

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Power estimation on functional level for programmable processors

Power estimation on functional level for programmable processors

... forward power estimation approach on DSPs is the so-called Physical-Level Power Analysis ...the processor architecture on the transistor level, which is rarely given for modern ...for digital ...

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Smart Mechanical Dipole: a device for the measurement of sphere motion in behavioral and neurophysiological experiments

Smart Mechanical Dipole: a device for the measurement of sphere motion in behavioral and neurophysiological experiments

... the digital signal processor (DSP), measured the displacement of the acrylic holder (above the water level) using a capacitive displacement transducer (4810, LOT- Oriel, Darmstadt, Germany), and the ...

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Bit Manipulation Accelerator for Communication Systems Digital Signal Processor

Bit Manipulation Accelerator for Communication Systems Digital Signal Processor

... With the rapid progress of communication technologies, var- ious communication systems have been developed, such as xDSL (digital subscriber line), WLAN (wireless local area network), PLC (power-line ...

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Design of Data Acquisition System for Analysis of Ecg Signal Using Low Power Processor

Design of Data Acquisition System for Analysis of Ecg Signal Using Low Power Processor

... ECG signal is amplified by the instrumentation amplifier (INA 321 from Texas Instruments) then amplified ECG signals are converted into digital signal using ultra-low power ...

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LOW POWER AND AREA EFFICIENT MULTIPLIERS FOR DIGITAL SIGNAL PROCESSING

LOW POWER AND AREA EFFICIENT MULTIPLIERS FOR DIGITAL SIGNAL PROCESSING

... Floating point multipliers consume more silicon area and are relatively slower than the fixed point (Q-format) multipliers. An N-bit fixed point number can be represented as either an integer or a fractional number. ...

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The Design of a Custom 32-Bit SIMD Enhanced Digital Signal Processor

The Design of a Custom 32-Bit SIMD Enhanced Digital Signal Processor

... DSPs have much higher memory bandwidth and use lot more memory-to-memory instruc- tions, when compared to traditional processors [25]. While most DSPs tackle this problem using small, fast and simple parallel memory ...

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													High speed finite impulse response filter for low power devices

1. High speed finite impulse response filter for low power devices

... as Digital filters which are capable of taking digital input, process them and provide digital ...A digital filter uses a digital processor to perform numerical calculations on ...

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Digital Low Power Base Band Processor for RFID Tags

Digital Low Power Base Band Processor for RFID Tags

... 208 RFID transponders, or tags, carry object identifying data. This data may include the manufacturer, brand, model and a unique serial number. Collectively, this data is often referred to as the tag’s identity, or ID. ...

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Implementation of Low Power RISC Based Flexible DSP Processor

Implementation of Low Power RISC Based Flexible DSP Processor

... of processor by taking into consideration the factors like simple architecture construction and instruction set, easy instruction set for decoding and simplified control ...proposed processor having RISC 32 ...

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Microarchitectural Low-Power Design Techniques for Embedded Microprocessors

Microarchitectural Low-Power Design Techniques for Embedded Microprocessors

... the processor are set such that for any sequence of instructions that the processor executes, timing errors only occur extremely rarely, ...a processor pipeline since in many cycles critical or ...

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Low Power Processor Architectures and Contemporary Techniques for Power Optimization – A Review

Low Power Processor Architectures and Contemporary Techniques for Power Optimization – A Review

... bus power. Filter caches or buffers which can be seen as low level cache for level 1 and level 2 caches are powerful in boosting the performance and reducing the power ...the power have also ...

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Audio signal processor

Audio signal processor

... audio signal processor capable of both sampling and audio processing external audio signals is ...audio signal processor can sample anaudio signal and store it in a fixed store in a two ...

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User manual DinaSys DTC/DTS and DTC/DTZ

User manual DinaSys DTC/DTS and DTC/DTZ

... Digital Signal sidings HF Generator Turntable power DTS/DTZ Data USB CAN-bus Emergency halt DTS/DTZ power DTC power Digital Signal.. Flat cable to turntable.[r] ...

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ID C 1 Honeywell Digital Signal Processor Jan71 pdf

ID C 1 Honeywell Digital Signal Processor Jan71 pdf

... Basic Modes Fast Fourier Transform FFT Fast WalSh Transform FWT Time Window Weighting, W Square One Function, SQ Multiply Two Functions, MPLY Digital Filter Bank, DFB Complex Modes Power[r] ...

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TEXT DEPENDENT SPEAKER RECOGNITION ON DIGITAL SIGNAL PROCESSOR: IMPLEMENTATION AND OPTIMIZATION

TEXT DEPENDENT SPEAKER RECOGNITION ON DIGITAL SIGNAL PROCESSOR: IMPLEMENTATION AND OPTIMIZATION

... In the training phase, reference models are generated from the reference speech signals by obtaining the statistical parameters from the reference speech signal through feature extraction. A test signal is ...

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Review on Design & Realization of Adaptive Noise Canceller on Digital Signal Processor

Review on Design & Realization of Adaptive Noise Canceller on Digital Signal Processor

... novel power-line interference (PLI) detection and suppression algorithm was proposed to pre-process real time electrocardiogram (ECG) ...ECG power spectrum, and employs an optimal linear discriminant ...

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RAAR Processor: The Digital Image Processor

RAAR Processor: The Digital Image Processor

... implementing signal processing and point processing operations because of their ...a digital image processor which can perform some of the basic image pre-processing operations like thresholding, ...

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Hardware Implementation of Speech Recognition Using MFCC and Euclidean Distance

Hardware Implementation of Speech Recognition Using MFCC and Euclidean Distance

... Speech Recognition is the process of automatically recognizing the spoken words of person based on information in speech signal. Each spoken word is created using the phonetic combination of a set of vowel, ...

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