on-chip communication architecture
On chip communication architecture power estimation in high frequency high power model
... on chip communication architecture solved the problem of how to interconnect hundreds of processing element (PE) and storage element (SE) inside one chip, but in the other hand it introduced ...
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Prioritized Direction based Switch for Bufferless Network on Chip Architecture
... switch address. XY routing algorithm is simple to implement. Drawback of XY routing scheme is that it resorts to packet drop incase of a deadlock which acts as a bottleneck in the performance of the NoC ...
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Design of a New Serializer and Deserializer Architecture for On Chip SerDes Transceivers
... This work has been carried out in SMDP VLSI Laboratory of the Electronics and Instrumentation Engineering Department of Shri G. S. Institute of Technology and Science, Indore, India. This SMDP VLSI project is guided by ...
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Network-on-Chip Architecture Based on Cluster Method
... a chip, the SoC of bus structure is poor at scalability, flexibility, reusability, and ...of communication requirements, general- purpose topology will be less efficient than application- specific ...
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Understanding the Impact of the Interconnection Network Performance of Multi-core Cluster Architectures
... evaluate communication performance ...inter-node communication network or focused on high performance multi-core architecture design without considering the effect of interconnection networks on the ...
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Network on Chip Architecture and Routing Techniques: A survey
... typical communication architectures like shared buses or point-to-point dedicated wires ...a chip with billions of transistors, it is not possible to send signals across the chip in real-time bounds ...
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A Study on Network-On-Chip architecture using Genetic Algorithm
... the communication traces on the interconnection network. Network-on-chip (NoC) is a new paradigm for designing scalable communication architecture for SoC (system on ...the ...
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RF low power subsampling architecture for wireless communication applications
... flexibility by adopting low sampling frequency [13, 14]. For example, the multi-channel receiver with channel filtering at RF has been reported in [14], which can achieve −78 dBm sensitivity at 10 −3 BER for BFSK ...
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Design of an AMBA AHB Reconfigurable Arbiter for On-chip Bus Architecture
... System-on Chip (SOC) design is having many different IP cores, which are linked together with complex on-chip bus communication ...bus communication architecture is a primary ...
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An RF Transceiver for Wireless Chip-to-Chip Communication Using a Cross-Coupled Oscillator
... transceiver architecture for wireless chip-to-chip communication using on/off keying (OOK) ...the chip-to-chip communication reliability is improved compared to a ...
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Topology Re Configuration for On Chip Networks with Back Tracking
... and communication flows ...the communication pattern of the currently running ...proposed architecture is achieved by inserting several simple switches in the network allowing the network to ...
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VHDL Design of Efficient Router Architecture for Network-on-Chip
... as communication architecture has been proved to be a bottleneck that limits the scalability, reusability and reliability of System-on-Chip (SoC) in ...intra-chip communication are ...
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Survey on Arbitration Techniques Used in On Chip Router Architecture
... In a NOC design, we should consider the need for an arbiter to resolve conflicts on shared resources (i.e., bus or equivalent communication channels) among multiple bus masters (e.g., processors). In a bus- based ...
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Communication-centric debug of systems-on-chip using networks-on-chip
... In Æthereal, packets are transported from one NI to another over a network of routers. Routers use wormhole routing and input queuing and can be connected in any topology, however mesh is mostly used. Wormhole routing ...
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Design of Router Micro Architecture Based on Runtime Adaptive Selection Strategies for On-Chip Communication Interconnection Network
... Abstract—To meet the growing computation-intensive applications and the needs of low-power, high- performance systems, and the number of computing resources in single-chip has enormously increased, because current ...
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An Interconnection Architecture for Seamless Inter and Intra-Chip Communication Using Wireless Links
... wireless communication link. On-chip antennas from graphene or Carbon Nanotube based structures are predicted to provide high bandwidth wireless communication channels [19] ...interchip ...
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Design and Implementation of an Efficient Router for 3D Network-On- Chip
... satellite communication system, from a television to a spacecraft ...the chip as smaller as possible while ensuring at the same time for more scalability, higher bandwidth and lower ...reliable ...
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The Reflected-Shifted-Truncated-Gamma Distribution for Negatively Skewed Survival Data with Application to Pediatric Nephrotic Syndrome
... Traditional chip pins were extended and converted to micro-antennas to achieve the wireless interconnection between chips for the purpose of solving the interconnection and signal integrity issues ...WIIC ...
150
Wireless Communication: Evolution and Advance Wireless Communication
... mobile communication networks can incorporate satellite communication networks and 5G to make global ...satellite communication networks consist of navigation, telecommunication, and Earth imaging ...
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Performance Analysis of On-Chip Memory Architecture Exploration of Embedded Processor
... on- chip memory space, partition this into data cache and scratch pad memory so that the total access time and energy dissipation is minimized, ...memory architecture is defined as a combination of the ...
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