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[PDF] Top 20 System on a Chip (SoC) Based Hardware Acceleration for Video Codec

Has 10000 "System on a Chip (SoC) Based Hardware Acceleration for Video Codec" found on our website. Below are the top 20 most common "System on a Chip (SoC) Based Hardware Acceleration for Video Codec".

System on a Chip (SoC) Based Hardware Acceleration  for Video Codec

System on a Chip (SoC) Based Hardware Acceleration for Video Codec

... the system speedup based on the co-processor ...of hardware accelerators is ...the hardware design, when designers use wire to connect two signals together, the result is generated ... See full document

6

SYSTEM-ON-A-CHIP (SOC)-BASED HARDWARE ACCELERATION FOR HUMAN ACTION RECOGNITION WITH CORE COMPONENTS

SYSTEM-ON-A-CHIP (SOC)-BASED HARDWARE ACCELERATION FOR HUMAN ACTION RECOGNITION WITH CORE COMPONENTS

... An efficient solution is required to identify bottlenecks in the proposed system. Ta- ble 3.2 presents the computational demand of the algorithm in units of the number of operations per second (GOPS) and the ... See full document

187

HEVC based Mixed Resolution Stereo Video Codec

HEVC based Mixed Resolution Stereo Video Codec

... HEVC based mixed-resolution stereo video codec (HEVC-MRSVC) [33], five standard multiview video datasets (of 4:2:0 format with 8 bit pixel resolution) called: “Poznan_Street", ... See full document

13

Interactive Cellular and Cordless Video Telephony: State of the Art System Design Principles and Expected Performance

Interactive Cellular and Cordless Video Telephony: State of the Art System Design Principles and Expected Performance

... motivated video bit stream partitioning, in order to more strongly protect the more error-sensitive synchronization and bit stream syntax-related header in- formation of standard video codecs, such as ... See full document

26

A Novel Hybrid Video Codec Scheme Using DWT-DCT Algorithm to Achieve High Degree Video Compression

A Novel Hybrid Video Codec Scheme Using DWT-DCT Algorithm to Achieve High Degree Video Compression

... in video surveillance system, it's essential to provide high economical video retrieval technique and advanced video compression ...a video coding scheme supported hybrid DWT- DCT ... See full document

12

HEVC based Stereo Video codec

HEVC based Stereo Video codec

... where video quality of the additional views are reduced by scaling down the resolution spatially or ...Asymmetric video coding techniques benefit from human visual system’s tolerance to suppressed high ... See full document

7

Hardware Acceleration of Histogram Equalization and Image Sharpening Filter on NIOS II Processor Based SOC on FPGA

Hardware Acceleration of Histogram Equalization and Image Sharpening Filter on NIOS II Processor Based SOC on FPGA

... Programming Chip) builder and NIOS-II soft processor eases the system development and NIOS-II IDE give software development ...grain acceleration of algorithms is a classic approach to accelerate the ... See full document

7

A System-Level SOC Verification Method based on Hardware Accelerator

A System-Level SOC Verification Method based on Hardware Accelerator

... The system-level verification is critical in a SOC design process due to the IP cores passing ...the SOC system-level verification is segmented into comprehensive test scenarios, according to ... See full document

5

Low-Power Video Codec Design

Low-Power Video Codec Design

... of video coding is to remove the data ...digital video data. Video coding is to represent the data in a more compact ...Most video coding algorithms adopt transform and motion compensation ... See full document

5

Frame Based Recovery of Corrupted Video Files Using Video Codec Specification

Frame Based Recovery of Corrupted Video Files Using Video Codec Specification

... extracted based on video frame from the unallocated space, as extracted from the storage medium for ...of video frame is searched for without consideringthe file system and the file ...extracted ... See full document

6

SoC  it  to  EM:  electromagnetic  side-channel  attacks  on  a  complex  system-on-chip

SoC it to EM: electromagnetic side-channel attacks on a complex system-on-chip

... level before resynthesising the (clean) signal. However, a high-magnitude, semi- correlated interference signal overlaid the low-magnitude signal of interest. Both signals separately had low-noise but the interference ... See full document

30

HEVC based Mixed resolution Stereo Video Coding for Low Bitrate Transmission

HEVC based Mixed resolution Stereo Video Coding for Low Bitrate Transmission

... stereo video coding model for High Efficiency Video Codec ...resolution video coding are enabling the codec to encode frames with different frame resolution/size and using decoded ... See full document

6

An AES based Intellectual Property Identification in System on a Chip Design

An AES based Intellectual Property Identification in System on a Chip Design

... AES is the Advanced Encryption Standard, a United States government standard algorithm for encrypting and decrypting data. The standard is described in Federal Information Processing Standard (FIPS). On January 2, 1997, ... See full document

6

FPGA Implementation of 3D DCT Requiring Only 14 Additions

FPGA Implementation of 3D DCT Requiring Only 14 Additions

... entropy coding, unlike lossy compression, as in the colour space, DCT and quantization procedures, the entropy coding compression is lossless. The zigzag process is an approximate ordering of the basic functions from low ... See full document

6

HARDWARE IMPLEMENTATION OF THE PCM CODEC FOR VOIP TELEPHONY

HARDWARE IMPLEMENTATION OF THE PCM CODEC FOR VOIP TELEPHONY

... Propagation delay is the time required for the electrical or optical signal to travel along a transmission medium and is a function of the geographic distance. Component delay is caused by the various components within ... See full document

11

Design and implementation of a gas 
		identification system on Zynq soc platform

Design and implementation of a gas identification system on Zynq soc platform

... smoothed moving average (SMA), logarithmic spike timing encoding (LSTE), rank order (RO), k-nearest neighbors (KNNs), multilayer perceptron (MLP), radial basis function (RBF), Gaussian mixture model (GMM), probabilistic ... See full document

7

FPGA Based Security System

FPGA Based Security System

... the system will be in user control mode, where user can establish a remote connection to observe the target area and make relevant control with the help of rotating unit called stepper ... See full document

5

Acceleration of Video Conversion on the GPU based Cloud

Acceleration of Video Conversion on the GPU based Cloud

... The system[9] was originally written in Java, which can only run on CPU. Now it is revised under OpenCL language, so as to make it runnable using parallel cores of GPU set of instances of cloud services of Amazon ... See full document

6

dtj v07 04 1995 pdf

dtj v07 04 1995 pdf

... A popular technique today is ro store actu:tl speech segments that contain phonemes and p honeme pairs. These sp..:cch segments, known as diphones, are obtained trom recordings of human speec h . They con­ rain all ... See full document

112

A novel fractal monocular and stereo video codec with object-based functionality

A novel fractal monocular and stereo video codec with object-based functionality

... To evaluate the performance of the proposed monocular codec, we use four video sequences: “hall.cif” (352 × 288 pixels, 15 frames), “highway.cif” (352 × 288 pixels, 15 frames), “race.yuv” (640 × 480, 15 ... See full document

12

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