carry select
Power-Efficient Carry Select Adder
6
Area–Delay–Power Efficient Carry-Select Adder
8
Design and Implementation of High Speed Carry Select Adder
5
VLSI IMPLEMENTATION OF AN EFFICIENT CARRY SELECT ADDER ARCHITECTURE
6
Design of Improved Array Multiplier by Carry Select Logic
7
Area–Delay–Power Efficient Carry-Select Adder
7
128 BIT SQUARE ROOT CARRY SELECT ADDER
6
Design and Implementation of Efficient Carry Select Adder in QCA
8
PERFORMANCE OF DADDA MULTIPLIER USING CARRY SELECT ADDER
10
LOW POWER AND REDUCED AREA IN CARRY SELECT ADDER
9
High Speed Non Linear Carry Select Adder
5
An Efficient Carry Select Adder with Reduced Area Application
6
An Implementation of Well Organized Delay-Area Carry Select Adder
7
Design of Low Power Carry Select Adder By Using VHDL
5
Power Efficient Carry Select Adder using D Latch
5
Design of 32 bit Carry Select Adder with Reduced Area
5
Design of High Speed Hybrid Sqrt Carry Select Adder
5
128 BIT MODIFIED SQUARE ROOT CARRY SELECT ADDER
8
Area-Efficient 128-bit Carry Select Adder Architecture
5
An Efficient Implementation of Multiplier Using Modified Carry Select Adder
9