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low-voltage low-power CMOS technology

Performance Improvement of Low Power Double Tail Comparator in UDSM CMOS Technology

Performance Improvement of Low Power Double Tail Comparator in UDSM CMOS Technology

... Static Power Eliminated version (HSDC -SPEV): To overcome the issue of direct current path from VDD to ground two nMOS switches below the input transistors [Msw1 and Msw2] and is shown in ...

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LOW POWER SAR USING CMOS TECHNOLOGY; VLSI IMPLEMENTATION

LOW POWER SAR USING CMOS TECHNOLOGY; VLSI IMPLEMENTATION

... in voltage according to charge balancing. If the voltage at SC is greater than half VREF, the converter assigns “0” to the MSB and transmits that value out of the serial ...this voltage is less than ...

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A Low Power High Sensitivity CMOS Multivibrator Based Voltage to Frequency Convertor

A Low Power High Sensitivity CMOS Multivibrator Based Voltage to Frequency Convertor

... a low power, high sensitivity CMOS multivibrator based voltage to frequency ...nm CMOS technology with ...1.8V power supply. It operates at input voltage ranges ...

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Deisgn of Low Power 16x16 Sram with Adiabatic Logic

Deisgn of Low Power 16x16 Sram with Adiabatic Logic

... to low-power electronic circuits that implement the reversible ...of CMOS. However, current CMOS technology, though fairly energy efficient compared to similar technologies, dissipate ...

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An Improved Low Power, High Speed CMOS Adder Design for Multiplier

An Improved Low Power, High Speed CMOS Adder Design for Multiplier

... ultra-low power diode and XOR gate logic. This ultra-low power diode is configure with PMOS and NMOS such that if low weak logic 0 occurs then this logic 0 restored in ULP Diode as ...

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A Low Voltage Low Power CMOS Implementation of Second Generation Orderly Current Buffer

A Low Voltage Low Power CMOS Implementation of Second Generation Orderly Current Buffer

... S. J. Azhari received the B.Sc. degree in Electronic Engineering from Iran University of Science and Technology (IUST), Narmak, Tehran, the M.Sc. degree in Electronic Instrumentation and Measurement from Victoria ...

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Low Power Consumption in 11t SRAM Design by using CMOS Technology

Low Power Consumption in 11t SRAM Design by using CMOS Technology

... high voltage (BL = „1 ‟ ), then the read operation is perform by special read word line (RWL), CBL turns high and the CBLB is turn to low voltage to turn off the transistor M7 and WL remains at ...at ...

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Utilizing Unconventional CMOS Techniques for Low Voltage Low Power Analog Circuits Design for Biomedical Applications

Utilizing Unconventional CMOS Techniques for Low Voltage Low Power Analog Circuits Design for Biomedical Applications

... unconventional CMOS techniques to design various active elements ...balanced voltage mode band pass Sallen-key filter, fully balanced voltage mode three-input single-output universal filter, and ...

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Low voltage CMOS Schmitt Trigger in 0.18 m technology

Low voltage CMOS Schmitt Trigger in 0.18 m technology

... proposed CMOS Schmitt Trigger circuit which is capable to operate in low voltage ...supply voltage is an effective method to achieve low power operation ...

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A Low Noise, Voltage Control Ring Oscillator Based on Pass Transistor Delay Cell

A Low Noise, Voltage Control Ring Oscillator Based on Pass Transistor Delay Cell

... ABSTRACT: Voltage control ring oscillators are the heart of communication ...of low noise voltage control ring oscillator in 0.18µm CMOS technology for the application ofFM radio ...

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Power and Area Efficient FLASH ADC Design using 65nm CMOS Technology

Power and Area Efficient FLASH ADC Design using 65nm CMOS Technology

... the CMOS technology is continuously scaling down, the design of ultra-high speed wired or wireless communication system is becoming ...digital CMOS technology a challenging aspect for analog ...

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A New Low-Voltage, Low-Power and High-Slew Rate CMOS Unity-Gain Buffer

A New Low-Voltage, Low-Power and High-Slew Rate CMOS Unity-Gain Buffer

... for low-power and high slew-rate analog ...Flipped Voltage Follower (FVF) that has better slew rate and the same power consumption as the conventional class-AB FVF buffer previously presented ...

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Efficient Implementation of Low Power CMOS Voltage Controlled Oscillator in PLL

Efficient Implementation of Low Power CMOS Voltage Controlled Oscillator in PLL

... for low power ...PLL power is dissipated at ...of low power CMOS VCO circuitry with the frequency range from 3GHz - 6GHz and reducing the power dissipation up to 20-25% by ...

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A REVIEW OF LOW POWER FLASH ADC USING THRESHOLD INVERTER QUANTIZATION TECHNIQUE

A REVIEW OF LOW POWER FLASH ADC USING THRESHOLD INVERTER QUANTIZATION TECHNIQUE

... 3-bit CMOS flash ADC utilizing Threshold Inverter Quantization technique” Kalpana Chaudhary, ...cascaded CMOS inverters as a ...in technology, digital signal processing has gained significant ...

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Improve Performance Of Low Power And Low Voltage Double Tail Comparator By Clock Gating

Improve Performance Of Low Power And Low Voltage Double Tail Comparator By Clock Gating

... highly-low power, efficient in area & higher in speed is pushed towards implementing in the dynamic comparators that are regenerative type to enhance the efficiency of power & ...for ...

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Low Voltage Low Power Analogue Circuits Design

Low Voltage Low Power Analogue Circuits Design

... with low power ...of power in the nanowatt range. However, the advances in VLSI technology, circuit design, and product market are actually ...decade, CMOS technology has played ...

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A Low Power Design of Encoder for Flash ADC Using CMOS Technology

A Low Power Design of Encoder for Flash ADC Using CMOS Technology

... reference voltage. The reference voltage for each comparator is one least significant bit (LSB) greater than the reference voltage for the comparator immediately below ...input voltage is ...

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Design of Low Power Low Voltage Circuit using CMOS Ternary Logic

Design of Low Power Low Voltage Circuit using CMOS Ternary Logic

... 7] Mariana Aguirre - Hernandez, Monico Linares - Aranda 2011 [7] In this paper author describes all the detail information regarding to design and performance comparison of full adder using alternative internal logic ...

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Gain and Bandwidth Enhancement in CMOS Low Voltage Low Power Operational Amplifiers

Gain and Bandwidth Enhancement in CMOS Low Voltage Low Power Operational Amplifiers

... a low-voltage low-power CMOS operational amplifier using the composite cascode technique is ...μm CMOS technology, to evaluate the proposed ...the low supply ...

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A 6.03 GHz Low Power Transimpedance Amplifier TIA in CMOS 0.18µm Technology

A 6.03 GHz Low Power Transimpedance Amplifier TIA in CMOS 0.18µm Technology

... The voltage source of ...bias voltage was under 1.8V and the dc bias current was constrained to low sub-micro- ampere value for low overall power ...bias voltage [15, ...

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