[PDF] Top 20 WRL 91 3 pdf

... Even were the driving transistors for all the nodes known, calculating current pulses for all the coupling capacitors in the circuit would be extremely expensive. Table 6 shows the total number of coupling capacitors in ... See full document

... denser vapor temperatures versus time measurements for a heat flux level of 5 W/cm for three different system pressures (pressure corresponding to the saturation pressure at the average vapor temperature). Jumps in the ... See full document

... From the previous sections, it is clear that both high performance write-back and write- through caches require a fair amount of additional support hardware and complexity, such as dirty bits, dirty victim buffers, ... See full document

... Figure 3 shows, for a 1-hour trace at WRL, how many processes were found to receive a particular number of ...at WRL) uses a different UDP port on the client ...because 91 processes received ... See full document

... A fundamentally different approach is to increase the area of the joint. We are all familiar with the idea of adding fins to a heat sink to increase surface area and improve the heat transfer to a passing fluid stream. ... See full document

... This process of faulting on a protected page, unprotecting it, and scanning and forwarding objects inside it repeats until there are no more protected pages left in the heap. Garbage collection is then complete, and the ... See full document

... A micro-TLB is a fully associative TLB with a very small number of entries (probably less than eight) which is reloaded in hardware from a larger shared TLB. A number of recent machines use micro-TLBs, including the MIPS ... See full document

... This section examines ezd’s concepts in more detail, and compares ezd to other X-based tools. Many X applications use Xt [3], a toolkit built on top of Xlib, X’s low-level C library. In con- junction with the ... See full document

... Two types of connectors are used on T1 equipment: an 8-pin modular telephone connector designated RJ48 by the FCC, and a 15-pin D-series subminiature connector. This adapter uses the new RJ48 connector, but it may ... See full document

... The results were disappointing. Even when coded in assembly language to get direct access to swl and swr, the opaque stipple technique improved painting of 6x13 by 3%. The problem lies in the narrowness of the ... See full document

... Figure 3-10 shows the decoding of the syndrome bits for a ...or 3) an address error: a location responded to more than one ...Figure 3-11 tabulates the syndrome values for single-bit errors in the ... See full document

... I created a weekly publication called The USENET Cookbook, which is published entirely by electronic distribution.. It is devoted to the distribution of recipes and food lore, and consis[r] ... See full document

... The original values of the control points for each invocation are compared to the new values, and, if they vary, the using statements associated with these invocations each get reexecute[r] ... See full document

... The readahead makes little difference because only a small percentage of the file references result in blocks being read ahead. A sequence of small file accesses within the same logical file block does not reference any ... See full document

... At this point, the scheduler has filled as many of the memory stalls and coprocessor stalls in the basic block as it can.* It then looks to see if the block ends with a branch whose slot[r] ... See full document

... We tested five register management schemes: compile-time, Steenkiste’s mixed strategy, link-time with use estimates, 16 fixed-sized windows of 8 registers, and variable-sized windows usi[r] ... See full document

... The filter language described in section 3 only allows the user to specify packet fields at con- stant offsets from the beginning of a packet. This has been adequate for protocols with fixed- format headers (such ... See full document

... The FPU program status word (PSW) is read only. It is addressed by coprocessor loads and stores as register 52 in the MultiTitan coprocessor register space. It is loaded every cycle while the CPU is in user mode with ... See full document

... The source host requests a visa from that ACS, which if necessary obtains visas from ACSs in other organizations, distributes visa information to the appropriate gateways, and returns th[r] ... See full document

... Grr uses a method developed by J. Prisner and R. Kao of WRL to solve this problem. This method effectively pushes the problem of ECL/TTL separation back to the designer. Each signal layer can be tesselated into ... See full document