pass transistor logic circuits
A Low Power Decoding Circuitry for a Multi Channel Data Acquisition System using Gate Diffusion Input
5
Design and Implementation of 17 Transistors Full Adder cell
7
Design of Parallel in Parallel out Shift Register using Clocked Pass Transistor Logic
5
Power and Area Efficient Error Tolerant Adder Using Pass Transistor XOR Logic in VLSI Circuits
5
Comparative Performance Analysis of XOR - XNOR Function Based High - Speed CMOS Full Adder Circuits
7
Design of Double Tail Comparator Using Dual Mode Logic in PTL Design
7
Comparative Analysis of Array Multiplier Using Different Logic Styles
7
IMPLEMENTATION OF COMPLEMENTARY PASS TRANSISTOR LOGIC FOR LOW POWER MULTIPLY AND ACCUMULATE CIRCUIT
6
LOW POWER MULTIPLEXER BASED FULL ADDER USING PASS TRANSISTOR LOGIC
6
An Approach to Design a New Multifunctional Reversible Logic Gate (MRLG)
8
Ultra Low Power Consumption Military Communication Systems
6
ADIABATIC LOGIC FOR LOW POWER DIGITAL DESIGN
9
Reduction of Leakage Power using Stacking Power Gating Technique in Different CMOS Design Style at 45Nanometer Regime
8
IMPLEMENTATION OF HIGH EFFICIENCY FULL ADDER
7
Analysis and Design of Low Power Arithmetic Circuits
8
Low Power Full Adder With Reduced Transistor Count
5
Design of Parallel Self Timed Adder
7
An Efficient Ultra Low Power Circuit by Using Subthreshold Adiabatic Logic
5
Low-Power Adder Design Using Full-Swing Gate Diffusion Input Logic
7
MODIFIED GDI TECHNIQUE - A POWER EFFICIENT METHOD FOR DIGITAL CIRCUIT DESIGN
22