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pass transistor logic circuits

A Low Power Decoding Circuitry for a Multi Channel Data Acquisition System using Gate Diffusion Input

A Low Power Decoding Circuitry for a Multi Channel Data Acquisition System using Gate Diffusion Input

... Many logic design techniques have been developed to improve the performance of Logic circuits built with traditional CMOS ...digital circuits is the Pass Transistor logic ...

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Design and Implementation of 17 Transistors Full Adder cell

Design and Implementation of 17 Transistors Full Adder cell

... Double Pass- transistor Logic (DPL) Full Adder cell that is shown in figure 1(k) and contains 24 ...DPL circuits full swing operation is ...CPL circuits, the occurring problems of ...

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Design of Parallel in Parallel out Shift Register using Clocked Pass Transistor Logic

Design of Parallel in Parallel out Shift Register using Clocked Pass Transistor Logic

... digital circuits. In this paper, a new Low Power Clocked Pass Transistor Flip-Flop is proposed, which will considerably reduce the number of transistors in the discharging path and also reduces the ...

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Power and Area Efficient Error Tolerant Adder Using Pass Transistor XOR Logic in VLSI Circuits

Power and Area Efficient Error Tolerant Adder Using Pass Transistor XOR Logic in VLSI Circuits

... electronics, pass transistor logic (PTL) describes several logic families used in the design of integrated ...different logic gates, by eliminating redundant transistors. ...

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Comparative Performance Analysis of XOR - XNOR Function Based High - Speed CMOS Full Adder Circuits

Comparative Performance Analysis of XOR - XNOR Function Based High - Speed CMOS Full Adder Circuits

... Logic Design and XOR-XNOR Design in a single unit. The main motive of this paper is to determine the comparative study of power, delay, power delay product (PDP) of different Full adder designs using CMOS ...

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Design of Double Tail Comparator Using Dual Mode Logic in PTL Design

Design of Double Tail Comparator Using Dual Mode Logic in PTL Design

... different pass-transistor network topologies is analyzed. Several pass-transistorlogic families have been introduced recently, but no systematic synthesis method is available that takes into account ...

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Comparative Analysis of Array Multiplier Using Different Logic Styles

Comparative Analysis of Array Multiplier Using Different Logic Styles

... of pass-transistor logic compared to the CMOS logic style is that the source side of the logic transistor networks is connected to some input signals instead of the power ...one ...

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IMPLEMENTATION OF COMPLEMENTARY PASS TRANSISTOR LOGIC FOR LOW POWER MULTIPLY AND ACCUMULATE CIRCUIT

IMPLEMENTATION OF COMPLEMENTARY PASS TRANSISTOR LOGIC FOR LOW POWER MULTIPLY AND ACCUMULATE CIRCUIT

... Pass transistor logic (PTL) describes several logic families which are used in the design of integrated ...different logic gates. Transistors are used as switches to pass ...

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LOW POWER MULTIPLEXER BASED FULL ADDER USING PASS TRANSISTOR LOGIC

LOW POWER MULTIPLEXER BASED FULL ADDER USING PASS TRANSISTOR LOGIC

... Pass transistor logic is used to improve the performance of arithmetic and logic ...This logic can be used to reduce the power dissipation in the system and to increase the speed of ...

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An Approach to Design a New Multifunctional Reversible Logic Gate (MRLG)

An Approach to Design a New Multifunctional Reversible Logic Gate (MRLG)

... digital circuits is the substantial energy these loss during ...Reversible circuits have fulfilled this need the best in the domain of digital ...Reversible Logic Gate ...and pass ...

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Ultra Low Power Consumption Military Communication Systems

Ultra Low Power Consumption Military Communication Systems

... use circuits, which heavily utilize transmission gates, and to implement these gates with single n-type transistors (Pass Transistor logic) instead of the two transistors generally ...type ...

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ADIABATIC LOGIC FOR LOW POWER DIGITAL DESIGN

ADIABATIC LOGIC FOR LOW POWER DIGITAL DESIGN

... Adiabatic logic which is proved to be the excellent technique to design the low power digital ...adiabatic logic with complementary energy path dual pass transistor logic ...

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Reduction of Leakage Power using Stacking Power Gating Technique in Different CMOS Design Style at 45Nanometer Regime

Reduction of Leakage Power using Stacking Power Gating Technique in Different CMOS Design Style at 45Nanometer Regime

... As transistor sizes scale down and levels of integration increase, leakage power has become a vital downside in modern low-power VLSI ...(ULV) circuits, wherever high levels of leakage force designers to ...

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IMPLEMENTATION OF HIGH EFFICIENCY FULL ADDER

IMPLEMENTATION OF HIGH EFFICIENCY FULL ADDER

... combinational logic circuit is said to be independent of time since it gives the results based on present input ...adder circuits using CMOS logic, pass transistor logic and ...

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Analysis and Design of Low Power Arithmetic Circuits

Analysis and Design of Low Power Arithmetic Circuits

... electronics, Pass transistor logic describes various logic families used in the design of integrated ...A pass transistor logic is used to enhance the performance of ...

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Low Power Full Adder With Reduced Transistor Count

Low Power Full Adder With Reduced Transistor Count

... Complementary pass transistor logic (CPL) full adder [3] provides high speed and full swing ...Hybrid pass logic (HPSC) full adders [7] with 22 transistors have poor ...of ...

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Design of Parallel Self Timed Adder

Design of Parallel Self Timed Adder

... circuit. Circuits may be classified as synchronous or ...Synchronous circuits are based on clock pulse whereas an asynchronous circuit, or self-timed circuit, is not governed by a clock circuit or global ...

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An Efficient Ultra Low Power Circuit by Using Subthreshold Adiabatic Logic

An Efficient Ultra Low Power Circuit by Using Subthreshold Adiabatic Logic

... Level shifting technique is used to decreasing the Vgs at the output of the transistor, gate and leakage current. This circuit achieves low power operation for the reason of low DC source is serially connected to ...

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Low-Power Adder Design Using Full-Swing Gate Diffusion Input Logic

Low-Power Adder Design Using Full-Swing Gate Diffusion Input Logic

... By using this technology we can implement a large circuit into a smaller chip. So that, this technology may improve the efficiency of the circuit design. In a ripple carry adder the sum and carry out bits of any half ...

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MODIFIED GDI TECHNIQUE - A POWER EFFICIENT METHOD FOR DIGITAL CIRCUIT DESIGN

MODIFIED GDI TECHNIQUE - A POWER EFFICIENT METHOD FOR DIGITAL CIRCUIT DESIGN

... the circuits and to incorporate added functions onto each chip, feature size has to ...the transistor in deep-nm regions, the power density of the chip will ...

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