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Combinational Circuits

Analog Very Large Scaled Of Integration (VLSI) Testing And Analysis Of Combinational Circuits Using Computer-Aided Design (CAD) Tools

Analog Very Large Scaled Of Integration (VLSI) Testing And Analysis Of Combinational Circuits Using Computer-Aided Design (CAD) Tools

... Chapter 2 covers the literature review of the project. Combinational circuits and several examples of this category of circuit are mentioned here. Also, analog VLSI testing and its types are discussed in ...

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Design and Implementation of Combinational Circuits using Reversible Gates

Design and Implementation of Combinational Circuits using Reversible Gates

... of Combinational Circuits using Reversible decoder in Xilinx", International Conference on Computer Communication and Signal Processing ICCCSP-17 Chennai [5] ...

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AUTOMATIC TEST PATTERN GENERATION TECHNIQUE FOR TESTING COMBINATIONAL CIRCUITS

AUTOMATIC TEST PATTERN GENERATION TECHNIQUE FOR TESTING COMBINATIONAL CIRCUITS

... A method of modifying ATPG tool to generate diagnostic patterns in A Fast Diagnostic Test Pattern Generator for Combinational Circuits was proposed by T.Gruning, U.Mahlstedt andH. Koopmeiners in Nov.1991.In ...

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Reversible Decoder for Complexity Design and Synthesis of Combinational Circuits in Xilinx

Reversible Decoder for Complexity Design and Synthesis of Combinational Circuits in Xilinx

... Reversible logic is the emerging field for research in present era. The aim of this paper is to realize different types of combinational circuits like full-adder, full-subtractor, multiplexer and comparator ...

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Fault Detection Probability Evaluation Approach in Combinational Circuits Using Test Set Generation Method

Fault Detection Probability Evaluation Approach in Combinational Circuits Using Test Set Generation Method

... tolerant combinational circuits were proposed using functional blocks of a VLSI-system to increase the reliability R (t) by means of linear error correcting codes ...multi-output circuits and ...

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Algorithms for Solving Boolean Satisfiability in Combinational Circuits

Algorithms for Solving Boolean Satisfiability in Combinational Circuits

... This paper proposes a new algorithm for solving Bool- ean Satisfiability problems in combinational circuits. For manipulating structural information, the proposed approach requires minor modifications in ...

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Analysis of Combinational Circuits using Positive Feed Back Adiabatic Logic

Analysis of Combinational Circuits using Positive Feed Back Adiabatic Logic

... VLSI circuits, power optimization is required due to increased demand for handheld ...implementing combinational circuits like Full Adder, Multiplexer, Demultiplexer, Encoder and ...the ...

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Cyclic combinational circuits

Cyclic combinational circuits

... In theoretical computer science, one of the main goals is to prove lower bounds on the resources (e.g., time and/or space) required for computation. A combinational circuits is often postulated as a ...

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A Review: Design and Analysis of Multi-Valued Logic for Quaternary Combinational Circuits

A Review: Design and Analysis of Multi-Valued Logic for Quaternary Combinational Circuits

... quaternary Combinational circuits for lower power ...for combinational circuits under case study without converting these levels into binary logic and ...

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Efficient test compaction for combinational circuits based on Fault detection count directed clustering

Efficient test compaction for combinational circuits based on Fault detection count directed clustering

... In this work, we have proposed a new test compaction tech- nique for combinational circuits based on test vector decomposition and clustering. Test vectors are decomposed and clustered for faults in an ...

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Solving Satisfiability in Combinational Circuits

Solving Satisfiability in Combinational Circuits

... As EDA evolves, researchers continue to find modeling tools to solve problems of test generation, design verification, logic, and physical synthesis, among others. One such modeling tool is Boolean satisfiability (SAT), ...

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Fault Tolerance Techniques for Combinational Circuits

Fault Tolerance Techniques for Combinational Circuits

... ABSTRACT: Increasing in soft error rates, the multiple faults is needed to be considered while modeling circuit sensitivity and evaluating fault tolerance techniques. This paper proposed a design of combinational ...

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Reliability Analysis and Optimization Models for Large Scale Combinational Circuits

Reliability Analysis and Optimization Models for Large Scale Combinational Circuits

... gate with q inputs (q > 2), the conditional probability matrix M will be in size of 2 q ×2 q , and involves the signal correlations among q inputs. While our model could be extended theoretically to this case, the ...

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Combinational circuits using transmission gate logic for power optimization

Combinational circuits using transmission gate logic for power optimization

... logic circuits results in the progress of many logical design techniques, even though there are several process technology and circuit level solutions to reduce leakage in ...

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Vhdl Implementation Of Evolutionary Algorithm In The Evolutionary Design Of Combinational Circuits

Vhdl Implementation Of Evolutionary Algorithm In The Evolutionary Design Of Combinational Circuits

... Reconfigurable FPGA is used as an evolvable hardware. Now a day Xilinx is the most popular model for evolvable hardware [7]. The FPGA can be divided into two parts. i.e. (i) programmable area,(ii) non programmable area ...

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Analysis of Self Checking Additional Adder Circuit in Combinational Circuits

Analysis of Self Checking Additional Adder Circuit in Combinational Circuits

... A simple ripple carry adder (RCA) is a digital circuit that produces the arithmetic sum of two binary numbers. It can be constructed with full adders connected in cascade, with the carry output from each full adder ...

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3-Weight Pseudo-Random Test Set Generation  For Combinational Circuits

3-Weight Pseudo-Random Test Set Generation For Combinational Circuits

... A method for generating weighted pseudo-random patterns, applicable to both combinational and sequential circuits, was described. The method was based on expansion of tests generated by a deterministic test ...

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Structure-Preserving Modeling of Safety-Critical Combinational Circuits

Structure-Preserving Modeling of Safety-Critical Combinational Circuits

... The transferability of circuits into other possibilities of rep- resentation is a necessary property to ensure the functional safety of safety critical circuits. In this work an output circuit has been ...

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Design and Implementing of combinational circuits using BIST for FPGAs

Design and Implementing of combinational circuits using BIST for FPGAs

... in combinational circuit such as effect-cause analysis, guided probing, analysis by forward propagation and backward implication using randomly generated input- pairs[8], analysis and diagnosis using both electron ...

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Ground Bouncing Noise Reduction in Combinational Circuits

Ground Bouncing Noise Reduction in Combinational Circuits

... CMOS technology feature size and threshold voltage have been scaling down for decades for achieving high density and high performance. Because of this race in technology trends transistor leakage power has increased ...

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