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static random-access memory (SRAM)

Review on Performance of Static Random Access Memory (SRAM)

Review on Performance of Static Random Access Memory (SRAM)

... SRAM: Static RAM in its dual ported form is used for real time digital signal processing circuits ...contain static random access ...etc. Static random access ...

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Energy Efficient Novel Design of Static Random Access Memory Memory Cell in Quantum-dot Cellular Automata Approach

Energy Efficient Novel Design of Static Random Access Memory Memory Cell in Quantum-dot Cellular Automata Approach

... This paper introduces a peculiar approach of designing Static Random Access Memory (SRAM) memory cell in Quantum-dot Cellular Automata (QCA) technique. The proposed design consists of ...

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Improve Performance Static Random Access Memory Based on Design PLPSRAM
                 

Improve Performance Static Random Access Memory Based on Design PLPSRAM  

... of Static Random Access memories (SRAM) that focuses on optimizing delay and ...power static access memory (PLPSRAM) cell is implemented with reduced power and performance is ...

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PERFORMANCE EVALUATION OF DIFFERENTREAD PORTS IN STATIC RANDOM ACCESS MEMORY IN 45NM CMOS TECHNOLOGY

PERFORMANCE EVALUATION OF DIFFERENTREAD PORTS IN STATIC RANDOM ACCESS MEMORY IN 45NM CMOS TECHNOLOGY

... The Static Random Access Memory (SRAM) has one of the most critical roles in modern computer architecture designs. The SRAM consists of an array of bit cells, each of which can store one bit ...

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STATIC RANDOM ACCESS MEMORY USING QUATERNARY D LATCH

STATIC RANDOM ACCESS MEMORY USING QUATERNARY D LATCH

... a static random access memory cell using quaternary logic is ...This static RAM is based on quaternary D ...4x4 memory array have also been designed and compared with 4x4 array ...

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Design & Analysis of Low power 10T Sram for High SNM using 45nm Design

Design & Analysis of Low power 10T Sram for High SNM using 45nm Design

... 10T static random access memory cell having decoupled 5T write port with single bitline and single ended read-bitline (RBL) with 5T read port for low power ...read static noise margin, ...

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Standard Cell Library Characterization of 28nm Process Based on Machine Learning

Standard Cell Library Characterization of 28nm Process Based on Machine Learning

... Abstract. This article presents a new learning method based on machine learning, which can quickly and accurately draw up the characterization of the Static Random-Access Memory (SRAM) ...

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A Sub-threshold 9T SRAM Cell with High Write and Read ability with Bit Interleaving Capability

A Sub-threshold 9T SRAM Cell with High Write and Read ability with Bit Interleaving Capability

... 9T static random-access memory (SRAM) cell compatible with bit interleaving structure in which the effective sizing adjustment of access transistors in write mode is provided by ...

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A RRAM Integrated 4T SRAM with Self Inhibit Resistive Switching Load by Pure CMOS Logic Process

A RRAM Integrated 4T SRAM with Self Inhibit Resistive Switching Load by Pure CMOS Logic Process

... non-volatile static random access memory (nv-SRAM) featuring its self-inhibit data storing mechanism for in low-power/high-speed SRAM ...resistive random access memory ...

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Leakage Controlled Read Stable Static Random Access Memories

Leakage Controlled Read Stable Static Random Access Memories

... Abstract —Semiconductor manufacturing process scaling increases leakage and transistor variations, both of which are problematic for static random access memory (SRAM). Since SRAM is a ...

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Reduced Power Consumption Memory Cell with 8T SRAM Cell

Reduced Power Consumption Memory Cell with 8T SRAM Cell

... technology. Static Random Access Memory (SRAM) is used in high speed applications such as cache memory which is very close or inside the processor and in case of its high power ...

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A Performance ofModern Dynamic Random Access Memory: A Systematic Review

A Performance ofModern Dynamic Random Access Memory: A Systematic Review

... for Static Random Access Memory and Measure stands for Dynamic Random Access ...primary memory while SRAM is generally utilized as a part of store memory ...

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A Power Analysis of SRAM Cell using 12t Topology for Faster Data Transmission

A Power Analysis of SRAM Cell using 12t Topology for Faster Data Transmission

... 12T Static Random Access Memory (SRAM) cell with the following advantages – reduced leakage current and enhanced performance, by using 180NM ...

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Comparative Analysis of 1 bit SRAM using Different SRAM cells in 45nm CMOS Technology

Comparative Analysis of 1 bit SRAM using Different SRAM cells in 45nm CMOS Technology

... Static Random Access Memory (SRAM) is a type of semiconductor volatile memory (RAM) which keeps its data until the power is turns ...of memory cells along with the row and column ...

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Vertically Partitioned SRAM-Based Ternary Content Addressable Memory

Vertically Partitioned SRAM-Based Ternary Content Addressable Memory

... novel memory architecture called VP SRAM-based TCAM (Vertically Partitioned Static Random Access Memory based-Ternary Content Addressable Memory) that emulates TCAM functionality ...

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Draft for a Council Regulation (EEC) temporarily suspending the autonomous Common Customs Tariff duties on certain industrial products. COM (83) 206 final, 15 April 1983.

Draft for a Council Regulation (EEC) temporarily suspending the autonomous Common Customs Tariff duties on certain industrial products. COM (83) 206 final, 15 April 1983.

... Static random access memory in H-MOS technoLogy H-MCS S-RAM, with a storage capacity of 1 K x 4 bits, and access time not exceeding 70 ns, in the form of a monolithic integrated circuit,[r] ...

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Area Efficient Counting Bloom Filter (A CBF) design for NIDS

Area Efficient Counting Bloom Filter (A CBF) design for NIDS

... An interesting target for the intruders is computers, since valuable data are fed into it. The need for impeccable intrusion detection system is growing every day. Hardware based Network Intrusion Detection System (NIDS) ...

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Low Power March Memory Test Algorithm for Static Random Access Memories (TECHNICAL NOTE)

Low Power March Memory Test Algorithm for Static Random Access Memories (TECHNICAL NOTE)

... power memory BIST algorithm is used to test ...based memory BIST architecture is implemented and is compared with traditional March algorithm and modified March ...on memory array, so there is no ...

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Comparative study of different technologies to replace CMOS technology

Comparative study of different technologies to replace CMOS technology

... based static Random Access Memory (TSRAM), FF, charge sensor, ultra-sensitive microwave detector, super sensitive electrometer, single py, quantum computer, programmable ...

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A transmon based quantum switch for a quantum random access memory

A transmon based quantum switch for a quantum random access memory

... Other systems to extract the information of the memory cells should also be studied. It is important to recover all the photons that are reflected by each individ- ual switch, but in this thesis I only give some ...

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